How can I change interrupt priority on the am335x board?

Hi,

What software and which version are you using?

I used to ti-sdk-am335x-evm-08.00.00.00
thank you reply

thank you your reply

but, I can't find irq-omap-intc.c

there is no file (irq-omap-intc.c)

 
my kernel version is 3.14.26.

sdk version is ti-sdk-am335x-evm-08.00.00.00

how can I fine the INTC_ILR_x register?

Where is INTC_ILR_x register?

Hi,

Sorry, I was referring to kernel 4.1.13 (lates sdk02.00.01.07).

The INTC initialization is done in arch/arm/mach-omap2/irq.c. You should set the priorities in init function: __init omap_init_irq().

INTC_ILR_X (x= 0 .. 127) registers are described in AM335x TRM, Section 6.5.1.44 INTC_ILR_0 to INTC_ILR_127 Register.

Best Regards,
Yordan

HI Yordan

I have one question.

I don't find INTC_ILR_X register setting function in the _init omap_init_irq()

=======================================================

static void __init omap_init_irq(u32 base, int nr_irqs,
     struct device_node *node)
{
 void __iomem *omap_irq_base;
 unsigned long nr_of_irqs = 0;
 unsigned int nr_banks = 0;
 int i, j, irq_base;

 omap_irq_base = ioremap(base, SZ_4K);
 if (WARN_ON(!omap_irq_base))
  return;

 irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
 if (irq_base < 0) {
  pr_warn("Couldn't allocate IRQ numbers\n");
  irq_base = 0;
 }

 domain = irq_domain_add_legacy(node, nr_irqs, irq_base, 0,
           &irq_domain_simple_ops, NULL);

 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
  struct omap_irq_bank *bank = irq_banks + i;

  bank->nr_irqs = nr_irqs;

  /* Static mapping, never released */
  bank->base_reg = ioremap(base, SZ_4K);
  if (!bank->base_reg) {
   pr_err("Could not ioremap irq bank%i\n", i);
   continue;
  }

  omap_irq_bank_init_one(bank);

  for (j = 0; j < bank->nr_irqs; j += 32)
   omap_alloc_gc(bank->base_reg + j, j + irq_base, 32);

  nr_of_irqs += bank->nr_irqs;
  nr_banks++;
 }

 pr_info("Total of %ld interrupts on %d active controller%s\n",
  nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
}

static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
{
 unsigned long tmp;

 tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff;
 pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n",
  bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);

 tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG);
 tmp |= 1 << 1; /* soft reset */
 intc_bank_write_reg(tmp, bank, INTC_SYSCONFIG);

 while (!(intc_bank_read_reg(bank, INTC_SYSSTATUS) & 0x1))
  /* Wait for reset to complete */;

 /* Enable autoidle */
 intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG);
}

===============================================================

there is no INTC_ILR_X register setting function in the  __init omap_irq_bank_init_one()

where is the INTC_ILR_X register setting function?

thank you

Hi

I have another question

below code is am335x dts file in the kernel

======================================================================
timer1: timer@44e31000 {
compatible = "ti,am335x-timer-1ms";
reg = <0x44e31000 0x400>;
interrupts = <67>; <= is this interrupts number and priority number??
ti,hwmods = "timer1";
ti,timer-alwon;
};

timer2: timer@48040000 {
compatible = "ti,am335x-timer";
reg = <0x48040000 0x400>;
interrupts = <68>; <= is this interrupts number and priority number??
ti,hwmods = "timer2";
};
======================================================================

is timer1 priority more then timer2 or just interrupt number??

is it right?

thank you for your reply.