AM335x MMU settings in ISDK

Hello.

I'm trying to modify bootloader from sysbios industrial sdk 1.1.0.10 to run it from nand on custom module mtax-som-am335x.

I got some issues with MMU.

If I use original mmu initialization code I get error then I try to reset nand:

CortxA8: Can't Single Step Target Program: (Error -2062 @ 0x1FE) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.83.1)
CortxA8: Trouble Halting Target CPU: (Error -2062 @ 0x1FE) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.83.1)

It occures on line 

(*(volatile unsigned char*)(cmdRegAddr)) = cmd;

where

cmdRegAddr is  0x5000007C and  cmd is 0xFF

I modified MMU initialization like this:

/*
** Function to setup MMU. This function Maps three regions (1. DDR
** 2. OCMC and 3. Device memory) and enables MMU.
*/
void MMUConfigAndEnable(void)
{
    /*
    ** Define DDR memory region of AM335x. DDR can be configured as Normal
    ** memory with R/W access in user/privileged modes. The cache attributes
    ** specified here are,
    ** Inner - Write through, No Write Allocate
    ** Outer - Write Back, Write Allocate
    */
    REGION regionDdr = {
                        MMU_PGTYPE_SECTION, START_ADDR_DDR, NUM_SECTIONS_DDR,
                        MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_CACHE_WT_NOWA,
                                                         MMU_CACHE_WB_WA),
                        MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
                        (unsigned int*)pageTable
                       };
    /*
    ** Define OCMC RAM region of AM335x. Same Attributes of DDR region given.
    */
    REGION regionOcmc = {
                         MMU_PGTYPE_SECTION, START_ADDR_OCMC, NUM_SECTIONS_OCMC,
                         MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_CACHE_WT_NOWA,
                                                          MMU_CACHE_WB_WA),
                         MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
                         (unsigned int*)pageTable
                        };

    /*
    ** Define Device Memory Region. The region between OCMC and DDR is
    ** configured as device memory, with R/W access in user/privileged modes.
    ** Also, the region is marked 'Execute Never'.
    */
    REGION regionDev = {
                        MMU_PGTYPE_SECTION, START_ADDR_DEV, NUM_SECTIONS_DEV,
						MMU_MEMTYPE_STRONG_ORD_SHAREABLE,
                        MMU_REGION_NON_SECURE,
                        MMU_AP_PRV_RW_USR_RW ,
                        (unsigned int*)pageTable
                       };
    REGION regionDev2 = {
    		MMU_PGTYPE_SECTION, 0x50000000, 10,
			MMU_MEMTYPE_DEVICE_SHAREABLE,//MMU_MEMTYPE_NORMAL_NON_SHAREABLE(0,
				//	0),
					MMU_REGION_NON_SECURE,
					MMU_AP_PRV_RW_USR_RO| MMU_SECTION_EXEC_NEVER ,
					(unsigned int*)pageTable
                           };



    REGION regionDev3 = {
        		MMU_PGTYPE_SECTION, 0x10000000, 1,
				MMU_MEMTYPE_STRONG_ORD_SHAREABLE,
    					MMU_REGION_NON_SECURE,
    					MMU_AP_PRV_RW_USR_RO | MMU_SECTION_EXEC_NEVER,
    					(unsigned int*)pageTable
                               };


    /* Initialize the page table and MMU */
    MMUInit((unsigned int*)pageTable);

    /* Map the defined regions */
    MMUMemRegionMap(&regionDdr);
    MMUMemRegionMap(&regionOcmc);
    MMUMemRegionMap(&regionDev);
    MMUMemRegionMap(&regionDev2);

    MMUMemRegionMap(&regionDev3);

    /* Now Safe to enable MMU */
    MMUEnable((unsigned int*)pageTable);
}
It's the same procedure except regions regionDev2  and regionDev3. 

After this I was able to reset nand, but I get simular error:

CortxA8: Can't Single Step Target Program: (Error -2062 @ 0x1FE) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.83.1)
CortxA8: Trouble Halting Target CPU: (Error -2062 @ 0x1FE) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.83.1)

It occures on line 

pinStatus = ((HWREG(baseAddr + GPMC_STATUS) & GPMC_STATUS_WAIT0STATUS)
>> GPMC_STATUS_WAIT0STATUS_SHIFT);

where baseAddr  is 0x50000000.

Please tell me how should I initialize MMU to work with nand?