AM335x GPMC_REVISION register read

Phil Chang

Intellectual 580 points

I'm working on am335x-starter-kit with ti-processor-sdk-linux-am335x-evm-02.00.02.11.

now, I want to try the GPMC register GPMC_REVISION, so I write a simple driver and

use gpmc_read_reg to read that, it's cause segmentation fault.

I try to read the omap-gpmc.c driver, found the gpmc_init was executed, but it's only registed a platform-driver.

I think GPMC must be allocte a part of memory so that I can use it. Then, allocate a memory is in gpmc_probe,

but on my device, there is no module hung on GPMC, which means no module connected with GPMC, so that the

gpmc_probe wouldn't execute, no io memory mapping to GPMC lead to segmentation fault, any suggestion?

I think if I only want to read the GPMC revision no need to set the GPMC configure, right?

over 9 years ago

0 Phil Chang over 9 years ago

Intellectual 580 points

I think only read the GPMC revision no need to set the GPMC configure, right?

0 Biser Gatchev-XID over 9 years ago in reply to Phil Chang

TI__Guru**** 393215 points

I will forward this to the software team.

0 Yordan Kovachev over 9 years ago

TI__Guru**** 161600 points

Hi,
I have two suggestions:
As you've noted gpmc_probe() in drivers/memory/omap-gpmc is the right place to read the REVISION register:
l = gpmc_read_reg(GPMC_REVISION);
printk("GPMC_REVISION is: %x", l); ==> this should print the GPMC revision during boot-up.

1) However, as you noted by default GPMC is not enabled in AM335x Starter Kit. You need to add &gpmc node & gpmc pinmux configuration in arch/arm/boot/dts/am335x-evmsk.dts. You can refer to am335x-evm.dts to see how GPMC is initialized:
&gpmc {
status = "okay"; ==> this enables the module, starts its func clocks, etc...
pinctrl-names = "default", "sleep";
pinctrl-0 = <&nandflash_pins_default>;
pinctrl-1 = <&nandflash_pins_sleep>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
........

Maybe just the addition of:
&gpmc {
status = "okay";

};

will be enough, experiment with this (in my experience I've used the full &gpmc as above with all the timings and cs settings).

2). If you just want to read the GPMC, from user space you can enable the GPMC fclk & then read the GPMC_REVISION:
devmem2 0x44E00030 w 0x2
devmem2 0x50000000

Best Regards,
Yordan

0 Phil Chang over 9 years ago in reply to Yordan Kovachev

Intellectual 580 points

Thx for reply,

As you mean, for suggestion1, I have to "do_enable_thing" on dts for GPMC, thus, the GPMC driver will execute gpmc_probe() or other function which can do io memory mapping, right?

0 Yordan Kovachev over 9 years ago in reply to Phil Chang

TI__Guru**** 161600 points

Yes, adding the &gpmc node with status="okay" is making the device driver to initilize the GPMC, enabling its functional clocks. From hereafter you can probe the device, perform io mapping, etc..

Best Regards,
Yordan

0 Phil Chang over 9 years ago in reply to Yordan Kovachev

Intellectual 580 points

Hi Yordan Kovachev:
great! It's workable, really really thanks for help!!!!!

0 Phil Chang over 9 years ago in reply to Yordan Kovachev

Intellectual 580 points

One more question please.
As suggestion 2, the command: "devmem2 0x44E00030 w 0x2" means write '0x2' to address '0x44E00030', why it can enable GPMC fclk?

0 Yordan Kovachev over 9 years ago in reply to Phil Chang

TI__Guru**** 161600 points

Have a look at the TRM:
Section 8.1.12.1.10 CM_PER_GPMC_CLKCTRL Register (offset = 30h) [reset = 30002h]

Writing 0x2 into CM_PER_GPMC_CLKCTRL[1:0]MODULEMODE means:
"0x2 = ENABLE : Module is explicitly enabled. Interface clock (if not used for functions) may be gated according to the clock domain state. Functional clocks are guarantied to stay present. As long as in this configuration, power domain sleep transition cannot happen."

Best Regards,
Yordan

0 Phil Chang over 9 years ago in reply to Yordan Kovachev

Intellectual 580 points

Hi Yordan,
Got it !!! thanks a lot again!

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AM335x GPMC_REVISION register read