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AM3358: Changing memory map from DDR to OCMC-SRAM

Kzk
Genius 5785 points

Part Number: AM3358

Hello,

I'm evaluating the following program of Processor SDK RTOS v3_02_00_05.
C:\ti\pdk_am335x_1_0_5\packages\ti\starterware\examples\gpio\led_blink

When changing program area from DDR to SRAM, I think it's necessary to change Makefile.
C:\ti\pdk_am335x_1_0_5\packages\ti\starterware\examples\gpio\led_blink\Makefile

I referred to the following Makefile.
C:\ti\pdk_am335x_1_0_5\packages\ti\starterware\bootloader\Makefile

I made the following changes into Makefile, is it correct? In the map file, it was changed to SRAM placement.

#LNKCMD_FILE = $(ROOTDIR)/examples/$(TOOLCHAIN)/$(SOCFAMILY)_ddr.lds
LNKCMD_FILE = $(ROOTDIR)/examples/$(TOOLCHAIN)/$(SOCFAMILY)_boot_ccs.lds

Do I also need the following additions?

ifeq ($(PLATFORM),am335x-evm)
 IMG_LOAD_ADDR = 0x402F0400
endif #($(PLATFORM),am335x-evm)

The program size does not exceed the SRAM size, but when I download the program, the following message is displayed on the console of CCS.

"CortxA8: Loader: One or more sections of your program falls into a memory region that is not writable.  These regions will not actually be written to the target.  Check your linker configuration and/or memory map."

While executing the MMUConfigAndEnable function in main function, it leads to a program runaway. It looks like initalizing pageTable array is cause.

When I comment out this function, the program runs correctly. However, because the cache is not enabled, the LED blinking interval is long.

Please give me some advice.

Regards,
Kazu

  • 0
    TI__Guru**** 393215 points
    Hi,

    The RTOS team have been notified. They will respond here.
  • 0
    TI__Guru** 116830 points
    Can you provide the the .lds file and the map file generated by the compiler when you provide -Map option. This should tell us if there is some code that is not being placed in the regions that you have specified for the platform.

    Also, check the MMUConfigAndEnable function. The function configured DDR, OCMC and the device region between OCMC and DDR. There is no configuration of IRAM. If you add the OCMC region to the .lds file and the MMUConfigAndEnable then I beleive, you should be able to get this code to work.

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    Genius 5785 points

    Hello Rahul,

    Thank you for your quick reply. I attached a map file. Could you give me some advice?

    I modified the environment so that it builds with GUI instead of command line. As I reported earlier, I changed lds file from ddr to iram. Since OCMC-RAM is not enough size, I also alterd STACKSIZE from 0x1C000 to 0x1000.

    Build -> GNU Linker -> Libraries: ../../../../gcc/am335x_boot_ccs.lds
    Build -> GNU Linker -> Symbols: STACKSIZE=0x1000

    The program runaway is occurred in MMUInit in MMUConfigAndEnable. An exception occurs during initialization of array pageTable.

    < mmu_arm.c >
    / * Set the master page table with fault entries * /
    For ((numPageTableEntry! = 0; numPageTableEntry--)
    {
    * PMasterPt ++ = MMU_PAGETABLE_ENTRY_FAULT;
    }

    < exceptionhandler.S >
    AbortHandler:
    UndefInstHandler:
    @
    @ Go to infinite loop.
    @
    Loop 0:
    B loop 0

    Also, when loading the program, I see the following message on the console.

    Cortx A8: Loader: One or more sections of your program falls into a memory region that is not writable. Check your linker configuration and / or memory map.

    Regards,
    Kazu

    gpio_app_led_blink_a8host_debug_iram.map.txt

  • 0 in reply to Kzk
    Genius 5785 points

    Hello Rahul,

    Do you have any advice?

    Regards,

    Kazu

  • 0 in reply to Kzk
    TI__Guru** 116830 points
    From the map file, all the regions appears that all the code is being placed in OCMC memory by the compiler so there seems to be no issue that I can see of memory being placed outside OCMC_0 or SRAM. Can you please also provide the .lds file (linker command file) and a snapshot of how the MMUconfigand enable function is setup. Have you removed the DDR sections from the MMU config.

    Also, specify how the MMU page table is setup. 4K pages aligned to 16 Kbyte boundary?? How many entries in the MMU page table.

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    Genius 5785 points

    Hello Rahul,

    Thank you for your advice. I attached the CCS project. Please see am335x_debug_iram configration.

    Please check am335x_iram.lds based on am335x_boot_ccs.lds. When I increased the stack from 0x800 to 0x1000, the program no longer runaway by initializing the pageTable array in MMUInit function. However, it aborts with the following MMUEnable function.

    Also please check example_utils_mmu.c which is excluded from build. I've made some modifications with MMUConfigAndEnable function. RegionOcmc.startAddr was originally 0x40300000.

    Regards,
    Kazu

    gpio_app_led_blink_iram.zip