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How many bits SPI EEPROM does TMS320 C6727 bootloader support?

Hi,

 

I can not find this information in any document, just like "SPRS660 - TMS320C5505" secton 4.4:

 

9. Test for 16-bit and 24-bit SPI EEPROM boot on SPI_CS[0] with 500-KHz  ......

 

But no such information in 'spru268 - TMS320C672x" or "SPRU718B - SPI Reference Guide".

Can anyone help?

 

thanks.

Lee

  • Hi Lee,

    For bootloader-related questions you should look at the C672x Bootloader App Note. The C6727B appears to allow the SPI Master/Slave to boot from 8-bit or 16-bit bit devices, but not from 24-bit devices. You would have to write a two-stage bootloader to reconfigure the SPI peripheral before communicating with a 24-bit EEPROM.

  • Hi Tim,

    Thanks for the reply.

    It seems no such information in C672x Bootloader App Note.

    In my understanding secondary bootloader is only for FLASH/EMIF boot mode, but not for SPI master boot mode.  Is it correct?

    If not, where can I find documents to describe creating second-level bootloader for SPI bootloading, similiar to "SPRA999A - Creating a Second-Level Bootloader for FLASH Blootloading" ?

     

    According to "SPRZ232F - C672x Errata", SPI Master boot mode is not recommended with excerp as follows.

    " Advisory 1.2.2 Do Not Use SPI Master Boot Mode for Silicon Revision 1.2/C9230C100 ROM  "

    So I am planning to move other boot modes such as FLASH.

    Lee