This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA3: Connection between IPU1_0 and IPU1_1

Part Number: TDA3

Hello everyone,

Is it possible to parse and start IPU1_0 (main) core from bootloader and to parse and start IPU1_1 core additionally from the application (in Vision SDK 2.12.01)?

I would like to start IPU1_0, and later to start an application that will parse, load and boot IPU1_1. Is this doable? Are there any special connections between these two cores that could make a problem?

Thanks in advance,

Jho.

  • Hi Jho,

    I have forwarded your question to VisionSDK experts.

    Regards,
    Yordan
  • Hi Jho,

    You can boot IPU1_1 image from Vision SDK application by following the below steps. You need to modify the SBL code as well to achieve this.

    1. SBL leaves IPU1_1 looping in a while loop in DDR in case it doesn't find an app image for it. You need to remove this code.

    The code is:

    /* Set while(1) loop */
            HW_WR_REG32((SBLLIB_IPU1_CORE1_BOOT_ADDRESS_NO_IMAGE - 1U), 0xE7FEE7FEU);
    
            SBLLibPrintf(SBLLIB_TRACE_LEVEL_IMP_INFO,
                         "\n No IPU1 CPU1 App Found, Switching to while Loop \n");
            HW_WR_REG32(SBLLIB_IPU1_CORE_1_ENTRY_POINT_ADDRESS,
                        SBLLIB_IPU1_CORE1_BOOT_ADDRESS_NO_IMAGE);

    2. Doing 1 causes IPU1_1 to be in a while loop in OCMC RAM. The Vision SDK application should not use OCMC RAM from 0x0 to 0x200 offset.

    3. Vision SDK appication should parse/load the app image for IPU1_1 and set entry point at SBLLIB_IPU1_CORE_1_ENTRY_POINT_ADDRESS.

    With these changes both IPU cores will work. Care should be taken that IPU1_1 image does not reconfigure AMMU as it might result in crash on IPU1_0.

    Regards,

    Rishabh

  • Hi Rishabh,

    I have try this, but I have one problem. When I do everything for IPU1_1 from application (parse, load, boot) it is not working, but when I put function SBLLibRprcImageParse (for IPU1_1) in bootloader, and then in application I do the rest:

    HW_WR_REG32(SBLLIB_IPU1_CORE_1_ENTRY_POINT_ADDRESS,
    gEntryPoints.entryPoint[SBLLIB_CORE_ID_IPU1_CPU1])

    it is working.
    This is strange for me, and I can't see a reason for this behavior. Is there some connection between IPU1_0 and IPU1_1 that I am missing?

    Thanks in advance,

    Jho.
  • Hi Jho,

    IPU1 is a dual core system where Core0 is the master and Core1 is the slave. When RBL hands over the control to SBL, Core1 is held in WFE.

    SBL will remap 0x0 to IPU RAM instead of ROM in order to have configurable vector table. If SEV is sent to core1 after remapping 0x0 a hard fault will occur. Hence SBL wakes up Core1 before remapping 0x0.

    SBL sets up a while loop in OCMC. SBL passes on OCMC address to AUXBOOT so that on sending 'SEV' Core1 jumps to OCMC and loops there. After parsing the application image SBL passes the entry point of IPU1_1 to it and IPU1_1 jumps to this location from OCMC.

    Regards,
    Rishabh

  • Hi Rishabh,

    This is clear for me from code and datasheet. The thing that confuses me is, why my application works properly only when IPU1_1 image is parsed from SBL? What is the difference in parsing IPU1_1 image in SBL and in application, when IPU1_0 is a master?

    Thanks in advance,

    Jho.
  • Hi Jho,

    IPU1_1 image should work fine when you are parsing from IPU1_0 application as well.
    One possible reason of failure could be that you have some loadable section at 0x0 location which is over writing the vector table of Core 0.
    Can you please check this. Thanks.

    Regards,
    Rishabh
  • Hi Rishabh,

    I will check it.
    Could EDMA be the problem here? Do I need to initialize it again in application?

    Thanks in advance,

    Jho.
  • Hi Jho,

    The problem is not with EDMA. The issue could be with the vector table.
    Both IPU cores have their vector table at 0x0.
    When BIOS comes up on Core1 it changes vector table base address to something else but there could be loadable section at 0x0 which is overwriting the Core0's vector table (Core 0 is already running).

    Regards,
    Rishabh
  • Hi Rishabh,

    If that is the case is any way to avoid it or is better to go back and parse IPU1_1 from SBL?

    Thanks in advance,

    Jho.
  • Hi Jho,
    I just gave a pointer for the debug. I am not sure if the above mentioned scenario is the exact cause of failure. Booting from application image or IPU1_1 depends on the use case. You can boot from either place.
    Regards,
    Rishabh

  • Hi Rishabh,

    I also think that I should be able to boot it from both places, but still, when I put SBLLibRprcImageParse (for IPU1_1) function in SBL it works, but when I put it in application it's not working. This parse function makes a difference.

    Thanks in advance,

    Jho.
  • Hi Rishabh,

    I also think that I should be able to boot it from both places, but still when I put SBLLibRprcImageParse (for IPU1_1) function in SBL and boot from application, it works, but when I put that function in application it doesn't work. This parse function makes a difference.

    Thanks in advance,

    Jho.
  • Hi Jho,

    Do you have the Vision SDK package with you?

    Regards,
    Rishabh
  • Hi Rishabh,

    Yes, I am using VisionSDK 2.12.01.

    Thanks in advance,

    Jho.
  • Hi Jho,

    You need to call API SBLLibMultiCoreImageParseV2 for parsing the application image in Vision SDK image. You also need to initialize some SBL Lib structures.
    Can you please refer to the Utils_bootSlaves API given in utils_boot_slaves.c. This API boots DSP1, DSP2 and EVE1 for TDA3xx device.

    Regards,
    Rishabh
  • Hi Jho,

    I looked at the Vision SDK code. SDK's DMA API is doing mem copy if data size is less than 1 KB but SBL Library gives L3 addresses due to which copy to IPU RAM might be failing.
    Please change everything to EDMA and then try.

    Regards,
    Rishabh