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TMS320C6748: AHCLK should be needed when McASP was used?

Sung-IL
Mastermind 31010 points
Part Number: TMS320C6748


Dear Champs,

Could you please let me know what is the purpose using AHCLKX/R in McASP?

When BT module is connected as an input and process BT audio and output it through McASP to AIC31x, should AHCLKX/R need to be connect to MCLK of AIC31 and BT module?

In normal case, I think it is not needed to connect AHCLKX/R and it is OK to use only BCLK(CLKX/R) and WCLK(FSX/R) for I2S audio data. Is my understanding right?

If it should be, could you please let me know how AHCLKX/R should be connected and designed?

BT module will be connected to McASP Rx of C6748 for audio input, and AIC31 will be connected to McASP Tx for audio output.

audio will be input through BT, and then it will be processed in C6748 DSP and output it through AIC31. this is basic scenario. I'm wondering if AHCLKX/R will be needed in this case.

Thanks and Best Regards,

SI.

  • 0
    TI__Guru 65405 points
    I've forwarded your query to the hardware design team. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0
    TI__Guru** 116180 points
    SI,

    I have answered a similar question for you in AM335x few months back. Can you look at the clocking block diagram and let us know if this is the information that you were looking for:
    e2e.ti.com/.../599472

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    TI__Mastermind 31010 points
    Hi Rahul,

    Thanks for your remind.
    BTW, if there is no sync between BT and AIC31 required, it is not required to connect MCLK to AHCLKX/R, right?


    Thanks and Best Regards,
    SI.
  • 0 in reply to Sung-IL
    TI__Intellectual 2350 points

    Hi SI,

    As far as McASP is concerned, you only need AHCLKX/R if you're going to generate ACLKX/R using AHCLKX/R.

    The typical example would be something like the Tx section of an AVR main output.  You might get an MCLK of 24.576 MHz from the HDMI chip or DIR, but will divide that down to a bit clock of 6.144 or 3.072 MHz for 96k and 48k use cases.  In that case you do need that high clock.

    If you're just receiving data from something but don't need to generate any clocks based on that source, then you only need the bit clock and frame sync.

    Does this help?

  • 0 in reply to Tufino
    TI__Intellectual 2350 points
    But keep in mind - that AIC chip might want an MCLK. If that needs to be synchronous to the clock provided by the BT unit, you may actually need it connected to McASP, so that you can generate Tx clocks based upon it. My above answer is general, but if you want specifics, we'd need a block diagram. We need to know who's supposed to be the clock master, what zones are supposed to be synchronous with respect to each other, etc.