AM572X: MDIO clock source

nac

Prodigy 40 points

What is the MDIO_CLK clock source? Is it the main_clk?
Same as AM335x?

MDIO_CONTROL register / [15:0] CLKDIV:

MDCLK frequency = ICLK frequency/(CLKDIV+1).

"ICLK frequency" is main_clk?

Best Regards.

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

See section 24.11.4.3.2.4 of the AM572x TRM Rev. I:

"The MDIO clock is based on a divide-down of the interface (MAIN_CLK) clock, running at 125 MHz. The application software or driver must control the divide-down value. See the MDIO_CONTROL register for configuring the Clock Divider (CLKDIV) value."

0 nac over 8 years ago in reply to Biser Gatchev-XID

Prodigy 40 points

I appreciate your help.

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AM572X: MDIO clock source