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AM3358: NAND page size questions

Jeff Fuller
Intellectual 350 points
Part Number: AM3358

Hi all,

My company spun an AM3358 board to increase its NAND size. The new NAND's specs:

– Page size x8: 8640 bytes (8192 + 448 bytes)
– Block size: 128 pages (1024K + 56K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– Device size: 32Gb: 4096 blocks;
64Gb: 8192 blocks;

QUESTION 1:

During boot, Linux outputted this error:

omap-elm 48080000.elm: unsupported config ecc-step=16

So I dug into the kernel code and the TRM's section on the GPMC/ELM, and it looks like the issue is that the ELM only supports page sizes of 2KB or 4KB:

26.1.7.4.1 Features
• Uses GPMC as the communication interface
• Device from 512Mbit (64MByte)
• x8 and x16 bus width
• Support for large page size (2048 bytes + 64 spare bytes) or very large page size 4096 bytes + 128 /
218 spare bytes)

Is there any way around this so that we can use our new NAND part with its 8K page size?

QUESTION 2:

For NAND with total size of 8GB, I assume we need the NAND part to two LUNs (logical units) in it and then need to also configure the Linux device tree's GPMC node to tell the GPMC to use 2 chip select lines.

This is due to the device tree GPMC node's partition fields storing partition sizes and offsets in 32 bits, meaning that we could not have a single 8GB address space. 

Thanks in advance!

  • 0
    TI__Guru**** 393215 points
    Please post the Linux version you use.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 350 points
    Apologies; we're on TI Processor SDK 3.03.00.04 which is Linux 4.4.41
  • 0 in reply to Jeff Fuller
    TI__Guru**** 393215 points
    Thanks, I have notified the NAND experts. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 350 points
    While waiting for the NAND experts, I'll add some background info that may be useful.

    This is an update to a board that has a functioning 1GB NAND part with 4K page size. The NAND was upgraded to the 8GB part with the specs I gave in my OP (8K page size).

    I was able to get SPL and U-Boot programmged into the new NAND part and can boot to U-Boot's command line from NAND (I first loaded SPL/U-Boot via USB and then used them to program SPL/U-Boot into NAND).

    I have the MTD partition table set to use only the first 4GB of NAND for now in order to avoid having to deal with with GPMC chipselects.

    In order to get SPL/U-Boot access of NAND to work, in addtion to modifying the vairous CONFIG macros that describe the NAND's ogranziation, I had to modify the CONFIG_SYS_NAND_ECCPOS marco in SPL/U-Boot to contain more OOB offsets:
    - ECCPOS originaly specified 208 OOB offsets from offset 2 through offset 209.
    - I changed it to specify 416 offsets from offset 2 through offset 417.

    The above change prevented an SPL crash that happened when the SPL loaded U-Boot from NAND.

    I'm not sure if the above change is feasailbe in the kernel. Heck, I'm not sure at this point if if the SPL/U-Boot is even using the CPU's ELM unit, or if it's instead doing ECC in software, as I haven't followed the code down that far yet.

    The problem, as I said, comes when I have U-Boot load the kernel from a TFTP server; as the kernel tries to configure the ELM, it reports the "omap-elm 48080000.elm: unsupported config ecc-step=16" error, which, after digging into the kernel's mtd/nand omap2 code and the TRM, I think means the ELM does not have enough syndrome polynomials to handle the NAND's 8K page size.

    After running into the above issue, and seeing the TRM state that NAND pages of 2K and 4K are supported (with no mention of 8K), the fact that the change I made to the SPL/U-Boot ECCPOS allows me to boot into U-Boot from NAND makes me wonder if:
    - SPL/U-Boot are doing ECC in software without the ELM
    - Or perhaps that the ECCPOS change, while allowing the U-Boot to load from NAND, will not actually perform sufficient error detection and correction for the 8K page size.

    Anyway, my initial concern is Question 1 from my OP, i.e. determine if the 8K page size is supported, and if so how to configure the kernel and/or device tree to handle it.
  • 0 in reply to Jeff Fuller
    TI__Genius 12540 points
    Jeff,

    As discussed offline, the GPMC/ELM is not able to support 8K pages, so we recommend using 4K-page parts with AM335x.

    Best regards,
    Michael