RTOS/TDA2P-ACD: Support to new DDR on custom board

Hrishikesh Rajurkar

Part Number: TDA2P-ACD
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

Hello All,

In the custom board based on TDA2Px, the customer intends to use DDR3 of size 2GB using EMIF1 interface.

The DDR chip is going to be different than Micron MT41K512M8RH-125 available on TDA2PX-EVM. (Details are yet to be known)

I am referring to the document SPRACA1 (Software Guidelines to EMIF/DDR3 Configuration onDRA7xx Devices) where steps to configure EMIF in SBL are mentioned (section 4.1).

However I am not able to find corresponding functions in Processor SDK v3.02 . Also in PSDK the DDR stress code is testing only 512 MB /EMIF DDR memory.

We will be using sysbios all configuration, will you please let us know that the steps to be done in VSDK codes so as to configure and use whole DDR memory.?

regards

Hrishikesh

over 7 years ago

0 Rishabh Garg over 7 years ago

TI__Guru 55685 points

Hi Hrishikesh,

You need to change the LISA map in the SBL to enable 2 GB memory. Just grep LISA_MAP in boot directory and make necessary changes as per your EVM.

Regards,
Rishabh

0 Hrishikesh Rajurkar over 7 years ago in reply to Rishabh Garg

Expert 1165 points

Hi Rishabh,
Thanks for the reply . Dont we need to follow the steps mentioned in section 3 of the application note SPRACA1 regarding usage of xls based tool for EMIF configuration ? I am referring to the post e2e.ti.com/.../615353
regards
Hrishikesh

0 Rishabh Garg over 7 years ago in reply to Hrishikesh Rajurkar

TI__Guru 55685 points

Hi Hrishikesh,

Those APIs provide you DDR timing parameters.
Unfortunately you can't directly replace the APIs.
You need to update timing parameters in pdk\packages\ti\boot\sbl_auto\sbl_utils\src\tda2xx\sbl_utils_tda2px_ddr_config.c.

Regards,
Rishabh

0 Hrishikesh Rajurkar over 7 years ago in reply to Rishabh Garg

Expert 1165 points

Hi Rishabh,
So as per my understanding following is the sequence
1. using xls tool generate timing information for new DDR IC
2. update the values in TDA2xx_set_emif1_params_ddr3_532() in pdk\packages\ti\boot\sbl_auto\sbl_utils\src\tda2xx\sbl_utils_tda2px_ddr_config.c
3. Update Lisa_map registers for supporting 2GB
4. Updating platform.xs file for 2GB
Please let me know if it is correct.
regards
Hrishikesh

0 Rishabh Garg over 7 years ago in reply to Hrishikesh Rajurkar

TI__Guru 55685 points

Yes, this is correct.

Regards,
Rishabh

Processors

Processors forum

RTOS/TDA2P-ACD: Support to new DDR on custom board