Hi team,
We are using AM4377 processor in one of our designs. We are designing the memory with 2 DDR3 chips, 13-bit address lines(MT41K64M16TW-107 IT). We are planning to route in Tree topology to avoid cost of termination regulator and resistors. But in the following link, we saw "there are certain restrictions" for using Tree topology: http://www.ti.com/tool/tidep0012
We would like to know what are those restrictions and we want to be sure whether we can go with Tree topology. What are termination (series termination) recommendations and maximum trace lengths allowed.
Best Regards,
Madhusoodana Bairy
+91-9538618846
