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66AK2E05: SGMII PCB Running length

Tarang Jindal68
Intellectual 820 points
Part Number: 66AK2E05

Hello, 

We are routing the SGMII Interface signals from K2E chip to other on board IC. 

In this IC to IC scenerio, What can be the maximum PCB trace length if the trace width is 4 mils. 

Thanks and Regards

Tarang Jindal

  • 0
    TI__Mastermind 46460 points

    Tarang,

    The exact answer is dependent on PCB materials and PCB stack-up.  Traces that are only 4 mils wide will have more loss than wider traces.  Of course, you will need to meet the required differential impedance with the board design too.  Please refer to the KeyStone II Architecture Serializer/Deserializer (SerDes) User's Guide SPRUHO3 chapter 9 for routing guidelines.

    SGMII is a relatively slow SERDES interface.  It should be able to easily cross more than 30 inches of PCB track on a nominal PCB.  Final validation is done through stress testing which is required to tune the SERDES settings.  Please see the SERDES Link Commissioning on KeyStone I and II Devices Application Report SPRAC37 for more details on the tuning techniques.

    Tom

  • 0
    Genius 3030 points

    HI,

    The answer is in the image below:

    I strongly recommend you to consider the trace width 6 mil just like what mentioned above so that you can be sure to be able to use maximum 20 inches (50 cm)  pin-to-pin trace length.

    I hope this helps and resolves your issue.

    Regards,

    Hossein

  • 0 in reply to Hossein Forouzani
    TI__Mastermind 46460 points

    Tarang,

    The reference from Hossein is reasonable.  With proper routing and care, you can achieve even longer routes.  I will close this thread.  Let us know if you have additional questions.

    Tom