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K2GICE: Pullups on QSPI pins

Brian Antheunisse
Expert 5265 points
Part Number: K2GICE
Other Parts Discussed in Thread: 66AK2G12

Hi guys,

I am wondering why both K2G EVM and K2G ICE boards have pull up resistors for both QSPI_D2 and QSPI_D3 pins but not QSPI_D0 and QSPI_D1? Is it ok to add pull up for D0 and D1?

Thanks,

Brian

  • 0
    TI__Guru**** 161600 points
    Hi Brian,

    I'd advise to follow the ICE/EVM implementation.

    See 66AK2G12 Datasheet, it states:
    "QSPI data 2. This pin is used only in quad read mode as input data pin during read phase."
    "QSPI data 3. This pin is used only in quad read mode as input data pin during read phase."

    So these pins work also as WP and HOLD for the qspi flash. They work as IO only in quad mode; see 25FL512SAGMFI011 datasheet.

    Best Regards,
    Yordan
  • 0
    TI__Mastermind 42545 points

    Hi Brian,

    As Yordan pointed out, these two pins are dual function and used as HOLD and WP in dual and serial I/O mode. Quad is not the default mode so they need to be pulled up until the QUAD bit is set in the configuration register. The part does have internal pulling resistors but I'm not very trusting so I added external resistors. Pull-up resistors are not needed for D0 and D1.

    Regards, Bill