Tool/software: TI-RTOS
Hi, base on AM5728 and RTOS,for ipc comunication, i want to use interrupt GPIO3_22 on ipu1,is there any demo or document can be refered to me.
thank you.
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Tool/software: TI-RTOS
Hi, base on AM5728 and RTOS,for ipc comunication, i want to use interrupt GPIO3_22 on ipu1,is there any demo or document can be refered to me.
thank you.
it's was my purpose that modified the code on ipc example(ipc_3_47_01_00/examples/DRA7XX_linux_elf/ex41_forwardmsg),and i want to configure GPIO interrupts on IPU1.
Hello,
I find it the GPIO_soc.c was use the csl,but the sys/bios user_Guide seem like had state the csl should not be use in the sys/bios, does it a confliction?
here's the description snippet:
3.4 Hardware Interrupts
Hardware interrupts (Hwis) handle critical processing that the application must perform in response to
external asynchronous events. The SYS/BIOS target/device specific Hwi modules are used to manage
hardware interrupts. See the document introducing Hwis for an overview.
In a typical embedded system, hardware interrupts are triggered either by on-device peripherals or by
devices external to the processor. In both cases, the interrupt causes the processor to vector to the ISR
address.
Any interrupt processing that may invoke SYS/BIOS APIs that affect Swi and Task scheduling must be
written in C or C++. The HWI_enter()/HWI_exit() macros provided in earlier versions of SYS/BIOS for
calling assembly language ISRs are no longer provided.
Assembly language ISRs that do not interact with SYS/BIOS can be specified with Hwi_plug(). Such ISRs
must do their own context preservation. They may use the "interrupt" keyword, C functions, or assembly
language functions.
All hardware interrupts run to completion. If a Hwi is posted multiple times before its ISR has a chance
to run, the ISR runs only one time. For this reason, you should minimize the amount of code performed
by a Hwi function.
If interrupts are globally enabled—that is, by calling Hwi_enable()—an ISR can be preempted by any
interrupt that has been enabled.
Hwis must not use the Chip Support Library (CSL) for the target. Instead, see Chapter 8 for a description
of Hardware Abstraction Layer APIs.
Associating an ISR function with a particular interrupt is done by creating a Hwi object.
hello,
I had read the sys/bios user guide,and then find it could use the hardware interrupt in this way:
#include <ti/sysbios/hal/Hwi.h>
#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>
Hwi_Handle myHwi;
Error_Block eb;
Error_init(&eb);
myHwi = Hwi_create(5, myIsr, NULL, &eb);
if (myHwi == NULL) {
System_abort("Hwi create failed");
}
and what my doubt is: how to configurate the gpio interrupt,such as the first parameter should be how much, and where the had it be mapped. and how to configurate the trigger mode for gpio interrupt,like Rising edge or falling edge.
thank you!
hello, i had use the gpio2_0 interrupts for ipu1 successfully, but i met a new problem, when i run my ipu1 program, it display the infomation in the linux kernel:
[ 24.601667] unexpected IRQ trap at vector 47
[ 24.651706] irq 71, desc: ef275000, depth: 1, count: 0, unhandled: 0
[ 24.651710] ->handle_irq(): c028124c,
[ 24.651711] handle_bad_irq+0x0/0x280
[ 24.651715] ->irq_data.chip(): ef224cd0,
[ 24.651715] 0xef224cd0
[ 24.651717] ->action(): (null)
[ 24.651718] IRQ_NOPROBE set
[ 24.651720] unexpected IRQ trap at vector 47
i thought it mabey the solution of this problem is to modify the device tree.
please let me know which file i must modify, and how to modify it.
thank you so much.
Hello,
A similar issue was reported and resolved in the following thread, please take a look. (DRA72x and AM572x are equivalent devices)
