RTOS/TMS320C6678: 6678 PHY work bad with 100M switch

Hi,

Can you clarify how do you test the SGMII throughput? What kinds of the software is running on DSP? How do you know if this is a driver problem or PHY problem? The throughput is Tx or Rx?

Is this your own board? How the SGMII is connected to PC? Like SGMII ------MAC------100M/1000M PHY?------RJ-45-----100M/1000M? switch-----Gigabit Ethernet port of PC? What do you mean 100M/1000M PHY? Or you mean 100M/1000M switch? What is the PHY part number?

Regards, Eric

Hi,

Any update?

Regards, Eric

Hi, Eric

Thanks for your reply. The software I use is helloworld example in mcsdk_2_01_02_05 which uses ndk_2_22_03_20 in upper layer and CSL level PHY/SGMII initialization code in pdk_C6678_1_1_2_5.

It looks like that I have two questions:

1. Why my CUSTOM board Tx effiency is bad when I have the link below:

SGMII(LinkSpeed 1000MHz) ------MAC------PHY(same as evm6678 board)------RJ-45-----100M switch-----Gigabit Ethernet port of PC.

The program is easy. Dsp side works as TCP server and PC side works as TCP client. And the DSP side send data(Tx) as quickly as possible. I can see from the PC side( Task Manager ),the peak usage of network efficiency (Rx )can only reach 10% of therotical value. However The corresponding result is 40%~70% when I just remove the 100M swich and keep all the other hardware/software unchanged. It looks that the 100M switch has some negtive effect to the DSP Tx side when its SGMII is configured to 1000M linkspeed mode.

2. Why I failed to set DSP Sgmii work in 100M linkspeed mode?

Now the link is as below,no switch in the link:
SGMII ------MAC------PHY(same as evm6678 board)------RJ-45--------Gigabit Ethernet port of PC.

I tried to make DSP work in 100M-linkspeed of SGMII to see if the low efficiency issue still exist.My modification is like : smiiCfg.linkSpeed = CSL_SGMII_100_MBPS in evmc66x_phy.c . The network is up but I did not see any difference from that when I set the value to CSL_SGMII_1000_MBPS . The Greee light is still on in DSP RJ45 port which indicate the link is still 1Gbps.

I tried to make more modificaions like autoneg and master/slave mode. None of that succeed to make DSP RJ45 port 100M mode. What's bad is if I enable SGMII master mode the NDK daemon can boot up but I can't ping to it. The link is not ready at all.

Hope that I make my issues clear.

Best Regards,

Striker

Hi,

From www.ti.com/.../sprugv9d.pdf

2.1.5 GMII Clock
The GMII clock frequencies are fixed by the 802.3 specification as follows:
• 2.5 MHz at 10 Mbps
• 25 MHz at 100 Mbps
• 125 MHz at 1000 Mbps

I will check our HW expert what relationship between GMII clock with SGMII serdes clock, if anything else to do from software side.

Regards, Eric

Striker,

There are 2 separate links here that need to be understood.  There is the metallic link between the PHY in the PC and the PHY on your board.  This link has the highest priority and it will automatically negotiate the maximum speed supported by both PHYs.

The second link is the SGMII link between the PHY on your board and the MAC in the C6678.  The PHY is the master of this link also.  The PHY will query the MAC for its capabilities and then link at the maximum rate supported by the MAC and PHY.  Limiting the speed of the MAC to 100M is not going to reduce the link speed between the PHYs.  You must tell the PHY (via pin strapping or MDIO control) that its maximum speed is 100Mbps.  Another method is addition of a 100Mbps switch between your board and the PC.  However, as you have already seen, this can distort your throughput results depending on the quality of the switch.

Tom

Hi, Tom

Thank you for making things clear.

However it's still terrible to get such distortion that the performace only reaches 10% of 100Mbps therotical number when there's a 100M switch in the link. Our switch is an industrial-grade one of Model Type EDS-205A. We've tested the performance of this switch with several host PCs and the thoughput result is almost 100% of therotical value.

What I'm confused is that I not sure whether it's a software or hardware issue. if your guys have the benchmark test number of similar scenario that 6678 RJ45 linked to a 100M Switch, please let me know.

Striker

Hi,

Sorry, we only have a hello world/ping style example for C6678. This is not a throughput test.

If you can provide the test application code, we can try to integrate with the latest NDK and test with TI 6678 EVM with 1000Mbps and 100Mbps to check the throughput. Also let us know what application you run on PC side.

Regards, Eric

Eric,

In DSP side I use NDK and create a TCP client  setting  TCP Transmit / Recv buffer size to 65536. There's a while(1) loop in a task and within the loop I was cyclicly sending TCP 1024Bytes socket . On PC side we use PCATTCP as server to receive and measure performance.

Hope that can help.

Striker

Hi,

Sorry I don't have such code example with TCP client + NDK, it is good if you can provide the code so I can try to reproduce the issue. Also, were you able to reproduce the issue on TI 6678 EVM?

Regards, Eric