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CCS/TMS320C6748: ccs/tms320C6748 PRU load and run

Intellectual 675 points

Replies: 14

Views: 1140

Part Number: TMS320C6748

Tool/software: Code Composer Studio

How do you start the execution of PRU code after loading it from c6748 main processor?  My context is as follows:

1. Wrote a PRU program consisting of main() only.  In the main(), two contiguous unsigned int values in shared RAM (at 0x80000000) is swapped.

2. PRU code is compiled (clpru v. 2.3.1) and linked and an ascii array representing PRU code is generated in little endian format.  This array is pasted in the test code that runs on the main processor.

3. The test code that runs on the processor does the following:  1)write 0's to control register at 0x01c37000.  2) writes the array above to the instruction memory of PRU0, 3) writes 0x0000000b to the control register.

4. After an arbitray delay, PRU is halted (by writing 0 to the enable bit in the control register) and the shared memory is checked.  The memory content is not what was expected.

5. Based on the observation in 4, I am concluding that PRU did not run.


  • /**
    * PRU main.c
    */
    int main(void) {

    volatile unsigned short *shared_RAM;
    unsigned short temp_short;

    shared_RAM = (unsigned short *) 0x80000000;

    temp_short= shared_RAM[0];
    shared_RAM[0]=shared_RAM[1];
    shared_RAM[1]=temp_short;

    while (1);

    return 0;
    }

    #include "PRU.h"
    #include "TI_psc.h"
    #include "TI_soc_C6748.h"

    const unsigned int PRU_main_image_0[] = {
    0x240000c0,
    0x24010080,
    0x0504e0e2,
    0x2eff818e,
    0x230007c3,
    0x240001ee,
    0x230013c3,
    0x0506e2e2,
    0x2401c3c0,
    0x24200080,
    0xe1002280,
    0xf1000081,
    0xe1040281,
    0xf1020081,
    0xe1000081,
    0xf1002280,
    0xf1040281,
    0xe1020081,
    0x21001200,
    0x230015c3,
    0x21001400,
    0x10000000,
    0x20c30000
    };


    int main(void) {  //main processor

    int i;
    volatile unsigned short *shared_RAM;

    shared_RAM = (unsigned short *) 0x80000000;

    shared_RAM[0]=0x5555;
    shared_RAM[1]=0xaaaa;

    /* Turning on the PRU */
    PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_PRU, PSC_POWERDOMAIN_ALWAYS_ON,
    PSC_MDCTL_NEXT_ENABLE);

    PRU0_DisableAndReset();
    PRU0_Load(PRU_main_image_0, (sizeof(PRU_main_image_0)/sizeof(int)));
    PRU0_Run();

    for (i=0;i<1000;i++) {

    }

    for (i=0;i<10000;i++) {
    if(PRU0_IsRunning())
    break;
    }

    PRU0_DisableAndReset();

    while (1);

    return 0;

    }

  • In reply to Peter Hong:

    Hi Peter,

    There was a similar issue reported in the following thread. Please see if it helps.


  • In reply to Sahin Okur:

    The post did not help.
  • In reply to Peter Hong:

    Hi Peter,

    Here are two quick and easy checks you can try:

    1. Confirm that PRU IRAM is loaded with program:

    a. Set break point before running “PRU0_Run();”
    b. Check the PRU0 IRAM contents (address 0x01C38000 for PRU0).  Does it contain the expected opcodes?

    2. Step through PRU code:

    I’m not sure what your firmware looks like, but you might update to the very beginning of main() to increment a variable by 1 several times.  You can then step through your code (instructions below) and monitor if one of the PRU R0-R29 registers (called INTGPR0 – INTGPR29 in the PRUSS memory map) increments by 1.  (Note the registers mentioned are described in section 12.8.1.3 of the TRM.)  This will confirm that your PRU code is getting compiled, loaded, and executed correctly.  

    a. Set break point before running “PRU0_Run();”
    b. Set the PRUSS CONTROL[8] SINGLESTEP bitfield   (Be careful not clear the SOFTRESET bit. This will reset the PRU.)
    c. Set the PRUSS CONTROL[1] ENABLE bitfield to step the PRU by one instruction.
    d. Keep stepping through the PRU code.  After each time you set the ENABLE bitfield, check INTGPRU0 – INTGPRU29 and see if a PRU register incremented.  (You can write all these registers to zero before starting to step through your code to make this identification easier.)

    Regards,

    Melissa

  • In reply to melissaw:

    Thanks, Melissa.

    fyi:  I am using ccs v8.2, clpru v2.3.1.  Hardware used  is OMAP L-138/c6748 LC Dev kit.

    Question:  will there be an SDK available any time soon for c6748 PRU to support debug?

    1.  Yes, I can display and view the PRU code, starting at address 0x01c38000.  I'm certain code is in PRU0 IMEM.   Here is the source code and link map for the PRU:

    /**

    * PRU main.c

    */

    int main(void)  {

       volatile unsigned short *shared_RAM;

       unsigned short temp_short;

       shared_RAM = (unsigned short *) 0x80000000;

       temp_short= shared_RAM[0];

       shared_RAM[0]=shared_RAM[1];

       shared_RAM[1]=temp_short;

       while (1);

       return 0;

    }

    ******************************************************************************

                        PRU Linker PC v2.3.1                      

    ******************************************************************************

    >> Linked Thu Dec  6 09:41:40 2018

    OUTPUT FILE NAME:   <PRU Sandbox.out>

    ENTRY POINT SYMBOL: "_c_int00_noinit_noargs"  address: 00000000

    MEMORY CONFIGURATION

            name            origin    length      used     unused   attr    fill

    ----------------------  --------  ---------  --------  --------  ----  --------

    PAGE 0:

     PRU_IMEM              00000000   00001000  0000005c  00000fa4  RWIX

    PAGE 1:

     PRU_DMEM_0_1          00000000   00000200  00000100  00000100  RWIX

     PRU_DMEM_1_0          00002000   00000200  00000000  00000200  RWIX

     PRU_SHAREDMEM         80000000   00020000  00000000  00020000  RWIX

    SECTION ALLOCATION MAP

    output                                  attributes/

    section   page    origin      length       input sections

    --------  ----  ----------  ----------   ----------------

    .text:_c_int00*

    *          0    00000000    0000001c    

                     00000000    0000001c     rtspruv3_le.lib : boot.c.obj (.text:_c_int00_noinit_noargs)

    .text      0    0000001c    00000040    

                     0000001c    00000030     main.obj (.text:main)

                     0000004c    00000008     rtspruv3_le.lib : exit.c.obj (.text:abort)

                     00000054    00000008                     : exit.c.obj (.text:loader_exit)

    .stack     1    00000000    00000100     UNINITIALIZED

                     00000000    00000004     rtspruv3_le.lib : boot.c.obj (.stack)

                     00000004    000000fc     --HOLE--

    .cinit     1    00002000    00000000     UNINITIALIZED

    MODULE SUMMARY

          Module         code   ro data   rw data

          ------         ----   -------   -------

       .\

          main.obj       48     0         0      

       +--+--------------+------+---------+---------+

          Total:         48     0         0      

       C:\ti\ccsv8\tools\compiler\ti-cgt-pru_2.3.1\lib\rtspruv3_le.lib

          boot.c.obj     28     0         0      

          exit.c.obj     16     0         0      

       +--+--------------+------+---------+---------+

          Total:         44     0         0      

          Stack:         0      0         256    

       +--+--------------+------+---------+---------+

          Grand Total:   92     0         256    

    SEGMENT ATTRIBUTES

       id tag      seg value

       -- ---      --- -----

        0 PHA_PAGE 1   1    

    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name

    page  address   name                        

    ----  -------   ----                        

    0     00000054  C$$EXIT                      

    abs   00000000  __PRU_CREG_BASE_PRU_DMEM_0_1

    abs   00002000  __PRU_CREG_BASE_PRU_DMEM_1_0

    abs   80000000  __PRU_CREG_BASE_PRU_SHAREDMEM

    abs   00000003  __PRU_CREG_PRU_DMEM_0_1      

    abs   00000004  __PRU_CREG_PRU_DMEM_1_0      

    abs   0000001e  __PRU_CREG_PRU_SHAREDMEM    

    1     00000100  __TI_STACK_END              

    abs   00000100  __TI_STACK_SIZE              

    abs   ffffffff  __c_args__                  

    0     00000000  _c_int00_noinit_noargs      

    1     00000000  _stack                      

    0     0000004c  abort                        

    0     0000001c  main                        

    GLOBAL SYMBOLS: SORTED BY Symbol Address

    page  address   name                        

    ----  -------   ----                        

    0     00000000  _c_int00_noinit_noargs      

    0     0000001c  main                        

    0     0000004c  abort                        

    0     00000054  C$$EXIT                      

    1     00000000  _stack                      

    1     00000100  __TI_STACK_END              

    abs   00000000  __PRU_CREG_BASE_PRU_DMEM_0_1

    abs   00000003  __PRU_CREG_PRU_DMEM_0_1      

    abs   00000004  __PRU_CREG_PRU_DMEM_1_0      

    abs   0000001e  __PRU_CREG_PRU_SHAREDMEM    

    abs   00000100  __TI_STACK_SIZE              

    abs   00002000  __PRU_CREG_BASE_PRU_DMEM_1_0

    abs   80000000  __PRU_CREG_BASE_PRU_SHAREDMEM

    abs   ffffffff  __c_args__                  

    [14 symbols]

    2.  Stopped before PRU_Run().  Singled stepped it by writing 0x0103 to control register.  Noticed that PC increments by 1 each time; stepped to PC=0x25.  Then, checked shared_RAM contents, but the contents were not swapped.  INTG0  block was initialized to zero; none changed between PC=0 to PC=0x25.

    Memory forMemory View.pdf

    Also, here is the absolute listing of main.c;

    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 1

    1 .compiler_opts_source "main.asm"
    26 00000000 .text
    27 .copy "main.asm"
    A 1;******************************************************************************
    A 2;* PRU C/C++ Codegen PC v2.3.1 *
    A 3;* Date/Time created: Wed Dec 5 09:08:19 2018 *
    A 4;******************************************************************************
    A 5 .compiler_opts --abi=eabi --diag_wrap=off --endian=little --hll_source=on --object_format=elf
    A 6
    A 7$C$DW$CU .dwtag DW_TAG_compile_unit
    A 8 .dwattr $C$DW$CU, DW_AT_name("../main.c")
    A 9 .dwattr $C$DW$CU, DW_AT_producer("TI PRU C/C++ Codegen PC v2.3.1 Copyright (c) 2012-2017 Texas
    A 10 .dwattr $C$DW$CU, DW_AT_TI_version(0x01)
    A 11 .dwattr $C$DW$CU, DW_AT_comp_dir("C:\Users\PeterH\workspace_v8\PRU Sandbox\Debug")
    A 12; C:\ti\ccsv8\tools\compiler\ti-cgt-pru_2.3.1\bin\acpiapru.exe -@C:\\Users\\PeterH\\AppData\\Loc
    A 13 0000001c .sect ".text:main"
    A 14 .clink
    A 15 .global ||main||
    A 16
    A 17$C$DW$1 .dwtag DW_TAG_subprogram
    A 18 .dwattr $C$DW$1, DW_AT_name("main")
    A 19 .dwattr $C$DW$1, DW_AT_low_pc(||main||)
    A 20 .dwattr $C$DW$1, DW_AT_high_pc(0x00)
    A 21 .dwattr $C$DW$1, DW_AT_TI_symbol_name("main")
    A 22 .dwattr $C$DW$1, DW_AT_external
    A 23 .dwattr $C$DW$1, DW_AT_type(*$C$DW$T$10)
    A 24 .dwattr $C$DW$1, DW_AT_TI_begin_file("../main.c")
    A 25 .dwattr $C$DW$1, DW_AT_TI_begin_line(0x06)
    A 26 .dwattr $C$DW$1, DW_AT_TI_begin_column(0x05)
    A 27 .dwattr $C$DW$1, DW_AT_decl_file("../main.c")
    A 28 .dwattr $C$DW$1, DW_AT_decl_line(0x06)
    A 29 .dwattr $C$DW$1, DW_AT_decl_column(0x05)
    A 30 .dwattr $C$DW$1, DW_AT_TI_max_frame_size(0x06)
    A 31 .dwpsn file "../main.c",line 6,column 17,is_stmt,address ||main||,isa 0
    A 32
    A 33 .dwfde $C$DW$CIE, ||main||
    A 34;----------------------------------------------------------------------
    A 35; 6 | int main(void) {
    A 36; 8 | volatile unsigned short *shared_RAM;
    A 37; 9 | unsigned short temp_short;
    A 38;----------------------------------------------------------------------
    A 39
    A 40;***************************************************************
    A 41;* FNAME: main FR SIZE: 6 *
    A 42;* *
    A 43;* FUNCTION ENVIRONMENT *
    A 44;* *
    A 45;* FUNCTION PROPERTIES *
    A 46;* 6 Auto, 0 SOE *
    A 47;***************************************************************
    A 48
    A 49 0000001c ||main||:
    A 50;* --------------------------------------------------------------------------*
    A 51 .dwcfi cfa_offset, 0
    A 52 0000001c 0000000506E2E2 SUB r2, r2, 0x06 ; []
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 2

    A 53 .dwcfi cfa_offset, 6
    A 54$C$DW$2 .dwtag DW_TAG_variable
    A 55 .dwattr $C$DW$2, DW_AT_name("shared_RAM")
    A 56 .dwattr $C$DW$2, DW_AT_TI_symbol_name("shared_RAM")
    A 57 .dwattr $C$DW$2, DW_AT_type(*$C$DW$T$20)
    A 58 .dwattr $C$DW$2, DW_AT_location[DW_OP_breg8 0]
    A 59
    A 60$C$DW$3 .dwtag DW_TAG_variable
    A 61 .dwattr $C$DW$3, DW_AT_name("temp_short")
    A 62 .dwattr $C$DW$3, DW_AT_TI_symbol_name("temp_short")
    A 63 .dwattr $C$DW$3, DW_AT_type(*$C$DW$T$9)
    A 64 .dwattr $C$DW$3, DW_AT_location[DW_OP_breg8 4]
    A 65
    A 66 .dwpsn file "../main.c",line 11,column 5,is_stmt,isa 0
    A 67;----------------------------------------------------------------------
    A 68; 11 | shared_RAM = (unsigned short *) 0x80000000;
    A 69;----------------------------------------------------------------------
    A 70 00000020 000080248000C0 LDI32 r0, 0x80000000 ; [] |11|
    00000027 00000000004024
    A 71 00000028 000000E1002280 SBBO &r0, r2, 0, 4 ; [] |11| shared_RAM
    A 72 .dwpsn file "../main.c",line 13,column 5,is_stmt,isa 0
    A 73;----------------------------------------------------------------------
    A 74; 13 | temp_short= shared_RAM[0];
    A 75;----------------------------------------------------------------------
    A 76 0000002c 000000F1000081 LBBO &r1.w0, r0, 0, 2 ; [] |13|
    A 77 00000030 000000E1040281 SBBO &r1.w0, r2, 4, 2 ; [] |13| temp_short
    A 78 .dwpsn file "../main.c",line 14,column 5,is_stmt,isa 0
    A 79;----------------------------------------------------------------------
    A 80; 14 | shared_RAM[0]=shared_RAM[1];
    A 81;----------------------------------------------------------------------
    A 82 00000034 000000F1020081 LBBO &r1.w0, r0, 2, 2 ; [] |14|
    A 83 00000038 000000E1000081 SBBO &r1.w0, r0, 0, 2 ; [] |14|
    A 84 .dwpsn file "../main.c",line 15,column 5,is_stmt,isa 0
    A 85;----------------------------------------------------------------------
    A 86; 15 | shared_RAM[1]=temp_short;
    A 87;----------------------------------------------------------------------
    A 88 0000003c 000000F1002280 LBBO &r0, r2, 0, 4 ; [] |15| shared_RAM
    A 89 00000040 000000F1040281 LBBO &r1.w0, r2, 4, 2 ; [] |15| temp_short
    A 90 00000044 000000E1020081 SBBO &r1.w0, r0, 2, 2 ; [] |15|
    A 91 .dwpsn file "../main.c",line 17,column 12,is_stmt,isa 0
    A 92;----------------------------------------------------------------------
    A 93; 17 | while (1);
    A 94; 19 | return 0;
    A 95;----------------------------------------------------------------------
    A 96;* --------------------------------------------------------------------------*
    A 97;* BEGIN LOOP ||$C$L1||
    A 98;*
    A 99;* Loop source line : 17
    A 100;* Loop closing brace source line : 17
    A 101;* Known Minimum Trip Count : 1
    A 102;* Known Maximum Trip Count : 4294967295
    A 103;* Known Max Trip Count Factor : 1
    A 104;* --------------------------------------------------------------------------*
    A 105 00000048 ||$C$L1||:
    A 106 00000048 00000021000000! JMP ||$C$L1|| ; [] |17|
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 3

    A 107;* --------------------------------------------------------------------------*
    A 108 .dwattr $C$DW$1, DW_AT_TI_end_file("../main.c")
    A 109 .dwattr $C$DW$1, DW_AT_TI_end_line(0x14)
    A 110 .dwattr $C$DW$1, DW_AT_TI_end_column(0x01)
    A 111 .dwendentry
    A 112 .dwendtag $C$DW$1
    A 113
    A 114
    A 115;******************************************************************************
    A 116;* TYPE INFORMATION *
    A 117;******************************************************************************
    A 118$C$DW$T$2 .dwtag DW_TAG_unspecified_type
    A 119 .dwattr $C$DW$T$2, DW_AT_name("void")
    A 120
    A 121$C$DW$T$4 .dwtag DW_TAG_base_type
    A 122 .dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
    A 123 .dwattr $C$DW$T$4, DW_AT_name("bool")
    A 124 .dwattr $C$DW$T$4, DW_AT_byte_size(0x01)
    A 125
    A 126$C$DW$T$5 .dwtag DW_TAG_base_type
    A 127 .dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
    A 128 .dwattr $C$DW$T$5, DW_AT_name("signed char")
    A 129 .dwattr $C$DW$T$5, DW_AT_byte_size(0x01)
    A 130
    A 131$C$DW$T$6 .dwtag DW_TAG_base_type
    A 132 .dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
    A 133 .dwattr $C$DW$T$6, DW_AT_name("unsigned char")
    A 134 .dwattr $C$DW$T$6, DW_AT_byte_size(0x01)
    A 135
    A 136$C$DW$T$7 .dwtag DW_TAG_base_type
    A 137 .dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
    A 138 .dwattr $C$DW$T$7, DW_AT_name("wchar_t")
    A 139 .dwattr $C$DW$T$7, DW_AT_byte_size(0x04)
    A 140
    A 141$C$DW$T$8 .dwtag DW_TAG_base_type
    A 142 .dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
    A 143 .dwattr $C$DW$T$8, DW_AT_name("short")
    A 144 .dwattr $C$DW$T$8, DW_AT_byte_size(0x02)
    A 145
    A 146$C$DW$T$9 .dwtag DW_TAG_base_type
    A 147 .dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned)
    A 148 .dwattr $C$DW$T$9, DW_AT_name("unsigned short")
    A 149 .dwattr $C$DW$T$9, DW_AT_byte_size(0x02)
    A 150
    A 151$C$DW$T$19 .dwtag DW_TAG_volatile_type
    A 152 .dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$9)
    A 153
    A 154$C$DW$T$20 .dwtag DW_TAG_pointer_type
    A 155 .dwattr $C$DW$T$20, DW_AT_type(*$C$DW$T$19)
    A 156 .dwattr $C$DW$T$20, DW_AT_address_class(0x20)
    A 157
    A 158$C$DW$T$10 .dwtag DW_TAG_base_type
    A 159 .dwattr $C$DW$T$10, DW_AT_encoding(DW_ATE_signed)
    A 160 .dwattr $C$DW$T$10, DW_AT_name("int")
    A 161 .dwattr $C$DW$T$10, DW_AT_byte_size(0x04)
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 4

    A 162
    A 163$C$DW$T$11 .dwtag DW_TAG_base_type
    A 164 .dwattr $C$DW$T$11, DW_AT_encoding(DW_ATE_unsigned)
    A 165 .dwattr $C$DW$T$11, DW_AT_name("unsigned int")
    A 166 .dwattr $C$DW$T$11, DW_AT_byte_size(0x04)
    A 167
    A 168$C$DW$T$12 .dwtag DW_TAG_base_type
    A 169 .dwattr $C$DW$T$12, DW_AT_encoding(DW_ATE_signed)
    A 170 .dwattr $C$DW$T$12, DW_AT_name("long")
    A 171 .dwattr $C$DW$T$12, DW_AT_byte_size(0x04)
    A 172
    A 173$C$DW$T$13 .dwtag DW_TAG_base_type
    A 174 .dwattr $C$DW$T$13, DW_AT_encoding(DW_ATE_unsigned)
    A 175 .dwattr $C$DW$T$13, DW_AT_name("unsigned long")
    A 176 .dwattr $C$DW$T$13, DW_AT_byte_size(0x04)
    A 177
    A 178$C$DW$T$14 .dwtag DW_TAG_base_type
    A 179 .dwattr $C$DW$T$14, DW_AT_encoding(DW_ATE_signed)
    A 180 .dwattr $C$DW$T$14, DW_AT_name("long long")
    A 181 .dwattr $C$DW$T$14, DW_AT_byte_size(0x08)
    A 182
    A 183$C$DW$T$15 .dwtag DW_TAG_base_type
    A 184 .dwattr $C$DW$T$15, DW_AT_encoding(DW_ATE_unsigned)
    A 185 .dwattr $C$DW$T$15, DW_AT_name("unsigned long long")
    A 186 .dwattr $C$DW$T$15, DW_AT_byte_size(0x08)
    A 187
    A 188$C$DW$T$16 .dwtag DW_TAG_base_type
    A 189 .dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float)
    A 190 .dwattr $C$DW$T$16, DW_AT_name("float")
    A 191 .dwattr $C$DW$T$16, DW_AT_byte_size(0x04)
    A 192
    A 193$C$DW$T$17 .dwtag DW_TAG_base_type
    A 194 .dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float)
    A 195 .dwattr $C$DW$T$17, DW_AT_name("double")
    A 196 .dwattr $C$DW$T$17, DW_AT_byte_size(0x08)
    A 197
    A 198$C$DW$T$18 .dwtag DW_TAG_base_type
    A 199 .dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float)
    A 200 .dwattr $C$DW$T$18, DW_AT_name("long double")
    A 201 .dwattr $C$DW$T$18, DW_AT_byte_size(0x08)
    A 202
    A 203 .dwattr $C$DW$CU, DW_AT_language(DW_LANG_C)
    A 204
    A 205;***************************************************************
    A 206;* DWARF CIE ENTRIES *
    A 207;***************************************************************
    A 208
    A 209$C$DW$CIE .dwcie 14
    A 210 .dwcfi cfa_register, 8
    A 211 .dwcfi cfa_offset, 0
    A 212 .dwcfi same_value, 8
    A 213 .dwcfi same_value, 9
    A 214 .dwcfi same_value, 10
    A 215 .dwcfi same_value, 11
    A 216 .dwcfi same_value, 16
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

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    main.abs PAGE 5

    A 217 .dwcfi same_value, 17
    A 218 .dwcfi same_value, 18
    A 219 .dwcfi same_value, 19
    A 220 .dwcfi same_value, 20
    A 221 .dwcfi same_value, 21
    A 222 .dwcfi same_value, 22
    A 223 .dwcfi same_value, 23
    A 224 .dwcfi same_value, 24
    A 225 .dwcfi same_value, 25
    A 226 .dwcfi same_value, 26
    A 227 .dwcfi same_value, 27
    A 228 .dwcfi same_value, 28
    A 229 .dwcfi same_value, 29
    A 230 .dwcfi same_value, 30
    A 231 .dwcfi same_value, 31
    A 232 .dwcfi same_value, 32
    A 233 .dwcfi same_value, 33
    A 234 .dwcfi same_value, 34
    A 235 .dwcfi same_value, 35
    A 236 .dwcfi same_value, 36
    A 237 .dwcfi same_value, 37
    A 238 .dwcfi same_value, 38
    A 239 .dwcfi same_value, 39
    A 240 .dwcfi same_value, 40
    A 241 .dwcfi same_value, 41
    A 242 .dwcfi same_value, 42
    A 243 .dwcfi same_value, 43
    A 244 .dwcfi same_value, 44
    A 245 .dwcfi same_value, 45
    A 246 .dwcfi same_value, 46
    A 247 .dwcfi same_value, 47
    A 248 .dwcfi same_value, 48
    A 249 .dwcfi same_value, 49
    A 250 .dwcfi same_value, 50
    A 251 .dwcfi same_value, 51
    A 252 .dwcfi same_value, 52
    A 253 .dwcfi same_value, 53
    A 254 .dwcfi same_value, 54
    A 255 .dwcfi same_value, 55
    A 256 .dwendentry
    A 257
    A 258;***************************************************************
    A 259;* DWARF REGISTER MAP *
    A 260;***************************************************************
    A 261
    A 262$C$DW$4 .dwtag DW_TAG_TI_assign_register
    A 263 .dwattr $C$DW$4, DW_AT_name("R0_b0")
    A 264 .dwattr $C$DW$4, DW_AT_location[DW_OP_reg0]
    A 265
    A 266$C$DW$5 .dwtag DW_TAG_TI_assign_register
    A 267 .dwattr $C$DW$5, DW_AT_name("R0_b1")
    A 268 .dwattr $C$DW$5, DW_AT_location[DW_OP_reg1]
    A 269
    A 270$C$DW$6 .dwtag DW_TAG_TI_assign_register
    A 271 .dwattr $C$DW$6, DW_AT_name("R0_b2")
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

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    main.abs PAGE 6

    A 272 .dwattr $C$DW$6, DW_AT_location[DW_OP_reg2]
    A 273
    A 274$C$DW$7 .dwtag DW_TAG_TI_assign_register
    A 275 .dwattr $C$DW$7, DW_AT_name("R0_b3")
    A 276 .dwattr $C$DW$7, DW_AT_location[DW_OP_reg3]
    A 277
    A 278$C$DW$8 .dwtag DW_TAG_TI_assign_register
    A 279 .dwattr $C$DW$8, DW_AT_name("R1_b0")
    A 280 .dwattr $C$DW$8, DW_AT_location[DW_OP_reg4]
    A 281
    A 282$C$DW$9 .dwtag DW_TAG_TI_assign_register
    A 283 .dwattr $C$DW$9, DW_AT_name("R1_b1")
    A 284 .dwattr $C$DW$9, DW_AT_location[DW_OP_reg5]
    A 285
    A 286$C$DW$10 .dwtag DW_TAG_TI_assign_register
    A 287 .dwattr $C$DW$10, DW_AT_name("R1_b2")
    A 288 .dwattr $C$DW$10, DW_AT_location[DW_OP_reg6]
    A 289
    A 290$C$DW$11 .dwtag DW_TAG_TI_assign_register
    A 291 .dwattr $C$DW$11, DW_AT_name("R1_b3")
    A 292 .dwattr $C$DW$11, DW_AT_location[DW_OP_reg7]
    A 293
    A 294$C$DW$12 .dwtag DW_TAG_TI_assign_register
    A 295 .dwattr $C$DW$12, DW_AT_name("R2_b0")
    A 296 .dwattr $C$DW$12, DW_AT_location[DW_OP_reg8]
    A 297
    A 298$C$DW$13 .dwtag DW_TAG_TI_assign_register
    A 299 .dwattr $C$DW$13, DW_AT_name("R2_b1")
    A 300 .dwattr $C$DW$13, DW_AT_location[DW_OP_reg9]
    A 301
    A 302$C$DW$14 .dwtag DW_TAG_TI_assign_register
    A 303 .dwattr $C$DW$14, DW_AT_name("R2_b2")
    A 304 .dwattr $C$DW$14, DW_AT_location[DW_OP_reg10]
    A 305
    A 306$C$DW$15 .dwtag DW_TAG_TI_assign_register
    A 307 .dwattr $C$DW$15, DW_AT_name("R2_b3")
    A 308 .dwattr $C$DW$15, DW_AT_location[DW_OP_reg11]
    A 309
    A 310$C$DW$16 .dwtag DW_TAG_TI_assign_register
    A 311 .dwattr $C$DW$16, DW_AT_name("R3_b0")
    A 312 .dwattr $C$DW$16, DW_AT_location[DW_OP_reg12]
    A 313
    A 314$C$DW$17 .dwtag DW_TAG_TI_assign_register
    A 315 .dwattr $C$DW$17, DW_AT_name("R3_b1")
    A 316 .dwattr $C$DW$17, DW_AT_location[DW_OP_reg13]
    A 317
    A 318$C$DW$18 .dwtag DW_TAG_TI_assign_register
    A 319 .dwattr $C$DW$18, DW_AT_name("R3_b2")
    A 320 .dwattr $C$DW$18, DW_AT_location[DW_OP_reg14]
    A 321
    A 322$C$DW$19 .dwtag DW_TAG_TI_assign_register
    A 323 .dwattr $C$DW$19, DW_AT_name("R3_b3")
    A 324 .dwattr $C$DW$19, DW_AT_location[DW_OP_reg15]
    A 325
    A 326$C$DW$20 .dwtag DW_TAG_TI_assign_register
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

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    main.abs PAGE 7

    A 327 .dwattr $C$DW$20, DW_AT_name("R4_b0")
    A 328 .dwattr $C$DW$20, DW_AT_location[DW_OP_reg16]
    A 329
    A 330$C$DW$21 .dwtag DW_TAG_TI_assign_register
    A 331 .dwattr $C$DW$21, DW_AT_name("R4_b1")
    A 332 .dwattr $C$DW$21, DW_AT_location[DW_OP_reg17]
    A 333
    A 334$C$DW$22 .dwtag DW_TAG_TI_assign_register
    A 335 .dwattr $C$DW$22, DW_AT_name("R4_b2")
    A 336 .dwattr $C$DW$22, DW_AT_location[DW_OP_reg18]
    A 337
    A 338$C$DW$23 .dwtag DW_TAG_TI_assign_register
    A 339 .dwattr $C$DW$23, DW_AT_name("R4_b3")
    A 340 .dwattr $C$DW$23, DW_AT_location[DW_OP_reg19]
    A 341
    A 342$C$DW$24 .dwtag DW_TAG_TI_assign_register
    A 343 .dwattr $C$DW$24, DW_AT_name("R5_b0")
    A 344 .dwattr $C$DW$24, DW_AT_location[DW_OP_reg20]
    A 345
    A 346$C$DW$25 .dwtag DW_TAG_TI_assign_register
    A 347 .dwattr $C$DW$25, DW_AT_name("R5_b1")
    A 348 .dwattr $C$DW$25, DW_AT_location[DW_OP_reg21]
    A 349
    A 350$C$DW$26 .dwtag DW_TAG_TI_assign_register
    A 351 .dwattr $C$DW$26, DW_AT_name("R5_b2")
    A 352 .dwattr $C$DW$26, DW_AT_location[DW_OP_reg22]
    A 353
    A 354$C$DW$27 .dwtag DW_TAG_TI_assign_register
    A 355 .dwattr $C$DW$27, DW_AT_name("R5_b3")
    A 356 .dwattr $C$DW$27, DW_AT_location[DW_OP_reg23]
    A 357
    A 358$C$DW$28 .dwtag DW_TAG_TI_assign_register
    A 359 .dwattr $C$DW$28, DW_AT_name("R6_b0")
    A 360 .dwattr $C$DW$28, DW_AT_location[DW_OP_reg24]
    A 361
    A 362$C$DW$29 .dwtag DW_TAG_TI_assign_register
    A 363 .dwattr $C$DW$29, DW_AT_name("R6_b1")
    A 364 .dwattr $C$DW$29, DW_AT_location[DW_OP_reg25]
    A 365
    A 366$C$DW$30 .dwtag DW_TAG_TI_assign_register
    A 367 .dwattr $C$DW$30, DW_AT_name("R6_b2")
    A 368 .dwattr $C$DW$30, DW_AT_location[DW_OP_reg26]
    A 369
    A 370$C$DW$31 .dwtag DW_TAG_TI_assign_register
    A 371 .dwattr $C$DW$31, DW_AT_name("R6_b3")
    A 372 .dwattr $C$DW$31, DW_AT_location[DW_OP_reg27]
    A 373
    A 374$C$DW$32 .dwtag DW_TAG_TI_assign_register
    A 375 .dwattr $C$DW$32, DW_AT_name("R7_b0")
    A 376 .dwattr $C$DW$32, DW_AT_location[DW_OP_reg28]
    A 377
    A 378$C$DW$33 .dwtag DW_TAG_TI_assign_register
    A 379 .dwattr $C$DW$33, DW_AT_name("R7_b1")
    A 380 .dwattr $C$DW$33, DW_AT_location[DW_OP_reg29]
    A 381
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 8

    A 382$C$DW$34 .dwtag DW_TAG_TI_assign_register
    A 383 .dwattr $C$DW$34, DW_AT_name("R7_b2")
    A 384 .dwattr $C$DW$34, DW_AT_location[DW_OP_reg30]
    A 385
    A 386$C$DW$35 .dwtag DW_TAG_TI_assign_register
    A 387 .dwattr $C$DW$35, DW_AT_name("R7_b3")
    A 388 .dwattr $C$DW$35, DW_AT_location[DW_OP_reg31]
    A 389
    A 390$C$DW$36 .dwtag DW_TAG_TI_assign_register
    A 391 .dwattr $C$DW$36, DW_AT_name("R8_b0")
    A 392 .dwattr $C$DW$36, DW_AT_location[DW_OP_regx 0x20]
    A 393
    A 394$C$DW$37 .dwtag DW_TAG_TI_assign_register
    A 395 .dwattr $C$DW$37, DW_AT_name("R8_b1")
    A 396 .dwattr $C$DW$37, DW_AT_location[DW_OP_regx 0x21]
    A 397
    A 398$C$DW$38 .dwtag DW_TAG_TI_assign_register
    A 399 .dwattr $C$DW$38, DW_AT_name("R8_b2")
    A 400 .dwattr $C$DW$38, DW_AT_location[DW_OP_regx 0x22]
    A 401
    A 402$C$DW$39 .dwtag DW_TAG_TI_assign_register
    A 403 .dwattr $C$DW$39, DW_AT_name("R8_b3")
    A 404 .dwattr $C$DW$39, DW_AT_location[DW_OP_regx 0x23]
    A 405
    A 406$C$DW$40 .dwtag DW_TAG_TI_assign_register
    A 407 .dwattr $C$DW$40, DW_AT_name("R9_b0")
    A 408 .dwattr $C$DW$40, DW_AT_location[DW_OP_regx 0x24]
    A 409
    A 410$C$DW$41 .dwtag DW_TAG_TI_assign_register
    A 411 .dwattr $C$DW$41, DW_AT_name("R9_b1")
    A 412 .dwattr $C$DW$41, DW_AT_location[DW_OP_regx 0x25]
    A 413
    A 414$C$DW$42 .dwtag DW_TAG_TI_assign_register
    A 415 .dwattr $C$DW$42, DW_AT_name("R9_b2")
    A 416 .dwattr $C$DW$42, DW_AT_location[DW_OP_regx 0x26]
    A 417
    A 418$C$DW$43 .dwtag DW_TAG_TI_assign_register
    A 419 .dwattr $C$DW$43, DW_AT_name("R9_b3")
    A 420 .dwattr $C$DW$43, DW_AT_location[DW_OP_regx 0x27]
    A 421
    A 422$C$DW$44 .dwtag DW_TAG_TI_assign_register
    A 423 .dwattr $C$DW$44, DW_AT_name("R10_b0")
    A 424 .dwattr $C$DW$44, DW_AT_location[DW_OP_regx 0x28]
    A 425
    A 426$C$DW$45 .dwtag DW_TAG_TI_assign_register
    A 427 .dwattr $C$DW$45, DW_AT_name("R10_b1")
    A 428 .dwattr $C$DW$45, DW_AT_location[DW_OP_regx 0x29]
    A 429
    A 430$C$DW$46 .dwtag DW_TAG_TI_assign_register
    A 431 .dwattr $C$DW$46, DW_AT_name("R10_b2")
    A 432 .dwattr $C$DW$46, DW_AT_location[DW_OP_regx 0x2a]
    A 433
    A 434$C$DW$47 .dwtag DW_TAG_TI_assign_register
    A 435 .dwattr $C$DW$47, DW_AT_name("R10_b3")
    A 436 .dwattr $C$DW$47, DW_AT_location[DW_OP_regx 0x2b]
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 9

    A 437
    A 438$C$DW$48 .dwtag DW_TAG_TI_assign_register
    A 439 .dwattr $C$DW$48, DW_AT_name("R11_b0")
    A 440 .dwattr $C$DW$48, DW_AT_location[DW_OP_regx 0x2c]
    A 441
    A 442$C$DW$49 .dwtag DW_TAG_TI_assign_register
    A 443 .dwattr $C$DW$49, DW_AT_name("R11_b1")
    A 444 .dwattr $C$DW$49, DW_AT_location[DW_OP_regx 0x2d]
    A 445
    A 446$C$DW$50 .dwtag DW_TAG_TI_assign_register
    A 447 .dwattr $C$DW$50, DW_AT_name("R11_b2")
    A 448 .dwattr $C$DW$50, DW_AT_location[DW_OP_regx 0x2e]
    A 449
    A 450$C$DW$51 .dwtag DW_TAG_TI_assign_register
    A 451 .dwattr $C$DW$51, DW_AT_name("R11_b3")
    A 452 .dwattr $C$DW$51, DW_AT_location[DW_OP_regx 0x2f]
    A 453
    A 454$C$DW$52 .dwtag DW_TAG_TI_assign_register
    A 455 .dwattr $C$DW$52, DW_AT_name("R12_b0")
    A 456 .dwattr $C$DW$52, DW_AT_location[DW_OP_regx 0x30]
    A 457
    A 458$C$DW$53 .dwtag DW_TAG_TI_assign_register
    A 459 .dwattr $C$DW$53, DW_AT_name("R12_b1")
    A 460 .dwattr $C$DW$53, DW_AT_location[DW_OP_regx 0x31]
    A 461
    A 462$C$DW$54 .dwtag DW_TAG_TI_assign_register
    A 463 .dwattr $C$DW$54, DW_AT_name("R12_b2")
    A 464 .dwattr $C$DW$54, DW_AT_location[DW_OP_regx 0x32]
    A 465
    A 466$C$DW$55 .dwtag DW_TAG_TI_assign_register
    A 467 .dwattr $C$DW$55, DW_AT_name("R12_b3")
    A 468 .dwattr $C$DW$55, DW_AT_location[DW_OP_regx 0x33]
    A 469
    A 470$C$DW$56 .dwtag DW_TAG_TI_assign_register
    A 471 .dwattr $C$DW$56, DW_AT_name("R13_b0")
    A 472 .dwattr $C$DW$56, DW_AT_location[DW_OP_regx 0x34]
    A 473
    A 474$C$DW$57 .dwtag DW_TAG_TI_assign_register
    A 475 .dwattr $C$DW$57, DW_AT_name("R13_b1")
    A 476 .dwattr $C$DW$57, DW_AT_location[DW_OP_regx 0x35]
    A 477
    A 478$C$DW$58 .dwtag DW_TAG_TI_assign_register
    A 479 .dwattr $C$DW$58, DW_AT_name("R13_b2")
    A 480 .dwattr $C$DW$58, DW_AT_location[DW_OP_regx 0x36]
    A 481
    A 482$C$DW$59 .dwtag DW_TAG_TI_assign_register
    A 483 .dwattr $C$DW$59, DW_AT_name("R13_b3")
    A 484 .dwattr $C$DW$59, DW_AT_location[DW_OP_regx 0x37]
    A 485
    A 486$C$DW$60 .dwtag DW_TAG_TI_assign_register
    A 487 .dwattr $C$DW$60, DW_AT_name("R14_b0")
    A 488 .dwattr $C$DW$60, DW_AT_location[DW_OP_regx 0x38]
    A 489
    A 490$C$DW$61 .dwtag DW_TAG_TI_assign_register
    A 491 .dwattr $C$DW$61, DW_AT_name("R14_b1")
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 10

    A 492 .dwattr $C$DW$61, DW_AT_location[DW_OP_regx 0x39]
    A 493
    A 494$C$DW$62 .dwtag DW_TAG_TI_assign_register
    A 495 .dwattr $C$DW$62, DW_AT_name("R14_b2")
    A 496 .dwattr $C$DW$62, DW_AT_location[DW_OP_regx 0x3a]
    A 497
    A 498$C$DW$63 .dwtag DW_TAG_TI_assign_register
    A 499 .dwattr $C$DW$63, DW_AT_name("R14_b3")
    A 500 .dwattr $C$DW$63, DW_AT_location[DW_OP_regx 0x3b]
    A 501
    A 502$C$DW$64 .dwtag DW_TAG_TI_assign_register
    A 503 .dwattr $C$DW$64, DW_AT_name("R15_b0")
    A 504 .dwattr $C$DW$64, DW_AT_location[DW_OP_regx 0x3c]
    A 505
    A 506$C$DW$65 .dwtag DW_TAG_TI_assign_register
    A 507 .dwattr $C$DW$65, DW_AT_name("R15_b1")
    A 508 .dwattr $C$DW$65, DW_AT_location[DW_OP_regx 0x3d]
    A 509
    A 510$C$DW$66 .dwtag DW_TAG_TI_assign_register
    A 511 .dwattr $C$DW$66, DW_AT_name("R15_b2")
    A 512 .dwattr $C$DW$66, DW_AT_location[DW_OP_regx 0x3e]
    A 513
    A 514$C$DW$67 .dwtag DW_TAG_TI_assign_register
    A 515 .dwattr $C$DW$67, DW_AT_name("R15_b3")
    A 516 .dwattr $C$DW$67, DW_AT_location[DW_OP_regx 0x3f]
    A 517
    A 518$C$DW$68 .dwtag DW_TAG_TI_assign_register
    A 519 .dwattr $C$DW$68, DW_AT_name("R16_b0")
    A 520 .dwattr $C$DW$68, DW_AT_location[DW_OP_regx 0x40]
    A 521
    A 522$C$DW$69 .dwtag DW_TAG_TI_assign_register
    A 523 .dwattr $C$DW$69, DW_AT_name("R16_b1")
    A 524 .dwattr $C$DW$69, DW_AT_location[DW_OP_regx 0x41]
    A 525
    A 526$C$DW$70 .dwtag DW_TAG_TI_assign_register
    A 527 .dwattr $C$DW$70, DW_AT_name("R16_b2")
    A 528 .dwattr $C$DW$70, DW_AT_location[DW_OP_regx 0x42]
    A 529
    A 530$C$DW$71 .dwtag DW_TAG_TI_assign_register
    A 531 .dwattr $C$DW$71, DW_AT_name("R16_b3")
    A 532 .dwattr $C$DW$71, DW_AT_location[DW_OP_regx 0x43]
    A 533
    A 534$C$DW$72 .dwtag DW_TAG_TI_assign_register
    A 535 .dwattr $C$DW$72, DW_AT_name("R17_b0")
    A 536 .dwattr $C$DW$72, DW_AT_location[DW_OP_regx 0x44]
    A 537
    A 538$C$DW$73 .dwtag DW_TAG_TI_assign_register
    A 539 .dwattr $C$DW$73, DW_AT_name("R17_b1")
    A 540 .dwattr $C$DW$73, DW_AT_location[DW_OP_regx 0x45]
    A 541
    A 542$C$DW$74 .dwtag DW_TAG_TI_assign_register
    A 543 .dwattr $C$DW$74, DW_AT_name("R17_b2")
    A 544 .dwattr $C$DW$74, DW_AT_location[DW_OP_regx 0x46]
    A 545
    A 546$C$DW$75 .dwtag DW_TAG_TI_assign_register
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 11

    A 547 .dwattr $C$DW$75, DW_AT_name("R17_b3")
    A 548 .dwattr $C$DW$75, DW_AT_location[DW_OP_regx 0x47]
    A 549
    A 550$C$DW$76 .dwtag DW_TAG_TI_assign_register
    A 551 .dwattr $C$DW$76, DW_AT_name("R18_b0")
    A 552 .dwattr $C$DW$76, DW_AT_location[DW_OP_regx 0x48]
    A 553
    A 554$C$DW$77 .dwtag DW_TAG_TI_assign_register
    A 555 .dwattr $C$DW$77, DW_AT_name("R18_b1")
    A 556 .dwattr $C$DW$77, DW_AT_location[DW_OP_regx 0x49]
    A 557
    A 558$C$DW$78 .dwtag DW_TAG_TI_assign_register
    A 559 .dwattr $C$DW$78, DW_AT_name("R18_b2")
    A 560 .dwattr $C$DW$78, DW_AT_location[DW_OP_regx 0x4a]
    A 561
    A 562$C$DW$79 .dwtag DW_TAG_TI_assign_register
    A 563 .dwattr $C$DW$79, DW_AT_name("R18_b3")
    A 564 .dwattr $C$DW$79, DW_AT_location[DW_OP_regx 0x4b]
    A 565
    A 566$C$DW$80 .dwtag DW_TAG_TI_assign_register
    A 567 .dwattr $C$DW$80, DW_AT_name("R19_b0")
    A 568 .dwattr $C$DW$80, DW_AT_location[DW_OP_regx 0x4c]
    A 569
    A 570$C$DW$81 .dwtag DW_TAG_TI_assign_register
    A 571 .dwattr $C$DW$81, DW_AT_name("R19_b1")
    A 572 .dwattr $C$DW$81, DW_AT_location[DW_OP_regx 0x4d]
    A 573
    A 574$C$DW$82 .dwtag DW_TAG_TI_assign_register
    A 575 .dwattr $C$DW$82, DW_AT_name("R19_b2")
    A 576 .dwattr $C$DW$82, DW_AT_location[DW_OP_regx 0x4e]
    A 577
    A 578$C$DW$83 .dwtag DW_TAG_TI_assign_register
    A 579 .dwattr $C$DW$83, DW_AT_name("R19_b3")
    A 580 .dwattr $C$DW$83, DW_AT_location[DW_OP_regx 0x4f]
    A 581
    A 582$C$DW$84 .dwtag DW_TAG_TI_assign_register
    A 583 .dwattr $C$DW$84, DW_AT_name("R20_b0")
    A 584 .dwattr $C$DW$84, DW_AT_location[DW_OP_regx 0x50]
    A 585
    A 586$C$DW$85 .dwtag DW_TAG_TI_assign_register
    A 587 .dwattr $C$DW$85, DW_AT_name("R20_b1")
    A 588 .dwattr $C$DW$85, DW_AT_location[DW_OP_regx 0x51]
    A 589
    A 590$C$DW$86 .dwtag DW_TAG_TI_assign_register
    A 591 .dwattr $C$DW$86, DW_AT_name("R20_b2")
    A 592 .dwattr $C$DW$86, DW_AT_location[DW_OP_regx 0x52]
    A 593
    A 594$C$DW$87 .dwtag DW_TAG_TI_assign_register
    A 595 .dwattr $C$DW$87, DW_AT_name("R20_b3")
    A 596 .dwattr $C$DW$87, DW_AT_location[DW_OP_regx 0x53]
    A 597
    A 598$C$DW$88 .dwtag DW_TAG_TI_assign_register
    A 599 .dwattr $C$DW$88, DW_AT_name("R21_b0")
    A 600 .dwattr $C$DW$88, DW_AT_location[DW_OP_regx 0x54]
    A 601
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 12

    A 602$C$DW$89 .dwtag DW_TAG_TI_assign_register
    A 603 .dwattr $C$DW$89, DW_AT_name("R21_b1")
    A 604 .dwattr $C$DW$89, DW_AT_location[DW_OP_regx 0x55]
    A 605
    A 606$C$DW$90 .dwtag DW_TAG_TI_assign_register
    A 607 .dwattr $C$DW$90, DW_AT_name("R21_b2")
    A 608 .dwattr $C$DW$90, DW_AT_location[DW_OP_regx 0x56]
    A 609
    A 610$C$DW$91 .dwtag DW_TAG_TI_assign_register
    A 611 .dwattr $C$DW$91, DW_AT_name("R21_b3")
    A 612 .dwattr $C$DW$91, DW_AT_location[DW_OP_regx 0x57]
    A 613
    A 614$C$DW$92 .dwtag DW_TAG_TI_assign_register
    A 615 .dwattr $C$DW$92, DW_AT_name("R22_b0")
    A 616 .dwattr $C$DW$92, DW_AT_location[DW_OP_regx 0x58]
    A 617
    A 618$C$DW$93 .dwtag DW_TAG_TI_assign_register
    A 619 .dwattr $C$DW$93, DW_AT_name("R22_b1")
    A 620 .dwattr $C$DW$93, DW_AT_location[DW_OP_regx 0x59]
    A 621
    A 622$C$DW$94 .dwtag DW_TAG_TI_assign_register
    A 623 .dwattr $C$DW$94, DW_AT_name("R22_b2")
    A 624 .dwattr $C$DW$94, DW_AT_location[DW_OP_regx 0x5a]
    A 625
    A 626$C$DW$95 .dwtag DW_TAG_TI_assign_register
    A 627 .dwattr $C$DW$95, DW_AT_name("R22_b3")
    A 628 .dwattr $C$DW$95, DW_AT_location[DW_OP_regx 0x5b]
    A 629
    A 630$C$DW$96 .dwtag DW_TAG_TI_assign_register
    A 631 .dwattr $C$DW$96, DW_AT_name("R23_b0")
    A 632 .dwattr $C$DW$96, DW_AT_location[DW_OP_regx 0x5c]
    A 633
    A 634$C$DW$97 .dwtag DW_TAG_TI_assign_register
    A 635 .dwattr $C$DW$97, DW_AT_name("R23_b1")
    A 636 .dwattr $C$DW$97, DW_AT_location[DW_OP_regx 0x5d]
    A 637
    A 638$C$DW$98 .dwtag DW_TAG_TI_assign_register
    A 639 .dwattr $C$DW$98, DW_AT_name("R23_b2")
    A 640 .dwattr $C$DW$98, DW_AT_location[DW_OP_regx 0x5e]
    A 641
    A 642$C$DW$99 .dwtag DW_TAG_TI_assign_register
    A 643 .dwattr $C$DW$99, DW_AT_name("R23_b3")
    A 644 .dwattr $C$DW$99, DW_AT_location[DW_OP_regx 0x5f]
    A 645
    A 646$C$DW$100 .dwtag DW_TAG_TI_assign_register
    A 647 .dwattr $C$DW$100, DW_AT_name("R24_b0")
    A 648 .dwattr $C$DW$100, DW_AT_location[DW_OP_regx 0x60]
    A 649
    A 650$C$DW$101 .dwtag DW_TAG_TI_assign_register
    A 651 .dwattr $C$DW$101, DW_AT_name("R24_b1")
    A 652 .dwattr $C$DW$101, DW_AT_location[DW_OP_regx 0x61]
    A 653
    A 654$C$DW$102 .dwtag DW_TAG_TI_assign_register
    A 655 .dwattr $C$DW$102, DW_AT_name("R24_b2")
    A 656 .dwattr $C$DW$102, DW_AT_location[DW_OP_regx 0x62]
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 13

    A 657
    A 658$C$DW$103 .dwtag DW_TAG_TI_assign_register
    A 659 .dwattr $C$DW$103, DW_AT_name("R24_b3")
    A 660 .dwattr $C$DW$103, DW_AT_location[DW_OP_regx 0x63]
    A 661
    A 662$C$DW$104 .dwtag DW_TAG_TI_assign_register
    A 663 .dwattr $C$DW$104, DW_AT_name("R25_b0")
    A 664 .dwattr $C$DW$104, DW_AT_location[DW_OP_regx 0x64]
    A 665
    A 666$C$DW$105 .dwtag DW_TAG_TI_assign_register
    A 667 .dwattr $C$DW$105, DW_AT_name("R25_b1")
    A 668 .dwattr $C$DW$105, DW_AT_location[DW_OP_regx 0x65]
    A 669
    A 670$C$DW$106 .dwtag DW_TAG_TI_assign_register
    A 671 .dwattr $C$DW$106, DW_AT_name("R25_b2")
    A 672 .dwattr $C$DW$106, DW_AT_location[DW_OP_regx 0x66]
    A 673
    A 674$C$DW$107 .dwtag DW_TAG_TI_assign_register
    A 675 .dwattr $C$DW$107, DW_AT_name("R25_b3")
    A 676 .dwattr $C$DW$107, DW_AT_location[DW_OP_regx 0x67]
    A 677
    A 678$C$DW$108 .dwtag DW_TAG_TI_assign_register
    A 679 .dwattr $C$DW$108, DW_AT_name("R26_b0")
    A 680 .dwattr $C$DW$108, DW_AT_location[DW_OP_regx 0x68]
    A 681
    A 682$C$DW$109 .dwtag DW_TAG_TI_assign_register
    A 683 .dwattr $C$DW$109, DW_AT_name("R26_b1")
    A 684 .dwattr $C$DW$109, DW_AT_location[DW_OP_regx 0x69]
    A 685
    A 686$C$DW$110 .dwtag DW_TAG_TI_assign_register
    A 687 .dwattr $C$DW$110, DW_AT_name("R26_b2")
    A 688 .dwattr $C$DW$110, DW_AT_location[DW_OP_regx 0x6a]
    A 689
    A 690$C$DW$111 .dwtag DW_TAG_TI_assign_register
    A 691 .dwattr $C$DW$111, DW_AT_name("R26_b3")
    A 692 .dwattr $C$DW$111, DW_AT_location[DW_OP_regx 0x6b]
    A 693
    A 694$C$DW$112 .dwtag DW_TAG_TI_assign_register
    A 695 .dwattr $C$DW$112, DW_AT_name("R27_b0")
    A 696 .dwattr $C$DW$112, DW_AT_location[DW_OP_regx 0x6c]
    A 697
    A 698$C$DW$113 .dwtag DW_TAG_TI_assign_register
    A 699 .dwattr $C$DW$113, DW_AT_name("R27_b1")
    A 700 .dwattr $C$DW$113, DW_AT_location[DW_OP_regx 0x6d]
    A 701
    A 702$C$DW$114 .dwtag DW_TAG_TI_assign_register
    A 703 .dwattr $C$DW$114, DW_AT_name("R27_b2")
    A 704 .dwattr $C$DW$114, DW_AT_location[DW_OP_regx 0x6e]
    A 705
    A 706$C$DW$115 .dwtag DW_TAG_TI_assign_register
    A 707 .dwattr $C$DW$115, DW_AT_name("R27_b3")
    A 708 .dwattr $C$DW$115, DW_AT_location[DW_OP_regx 0x6f]
    A 709
    A 710$C$DW$116 .dwtag DW_TAG_TI_assign_register
    A 711 .dwattr $C$DW$116, DW_AT_name("R28_b0")
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 14

    A 712 .dwattr $C$DW$116, DW_AT_location[DW_OP_regx 0x70]
    A 713
    A 714$C$DW$117 .dwtag DW_TAG_TI_assign_register
    A 715 .dwattr $C$DW$117, DW_AT_name("R28_b1")
    A 716 .dwattr $C$DW$117, DW_AT_location[DW_OP_regx 0x71]
    A 717
    A 718$C$DW$118 .dwtag DW_TAG_TI_assign_register
    A 719 .dwattr $C$DW$118, DW_AT_name("R28_b2")
    A 720 .dwattr $C$DW$118, DW_AT_location[DW_OP_regx 0x72]
    A 721
    A 722$C$DW$119 .dwtag DW_TAG_TI_assign_register
    A 723 .dwattr $C$DW$119, DW_AT_name("R28_b3")
    A 724 .dwattr $C$DW$119, DW_AT_location[DW_OP_regx 0x73]
    A 725
    A 726$C$DW$120 .dwtag DW_TAG_TI_assign_register
    A 727 .dwattr $C$DW$120, DW_AT_name("R29_b0")
    A 728 .dwattr $C$DW$120, DW_AT_location[DW_OP_regx 0x74]
    A 729
    A 730$C$DW$121 .dwtag DW_TAG_TI_assign_register
    A 731 .dwattr $C$DW$121, DW_AT_name("R29_b1")
    A 732 .dwattr $C$DW$121, DW_AT_location[DW_OP_regx 0x75]
    A 733
    A 734$C$DW$122 .dwtag DW_TAG_TI_assign_register
    A 735 .dwattr $C$DW$122, DW_AT_name("R29_b2")
    A 736 .dwattr $C$DW$122, DW_AT_location[DW_OP_regx 0x76]
    A 737
    A 738$C$DW$123 .dwtag DW_TAG_TI_assign_register
    A 739 .dwattr $C$DW$123, DW_AT_name("R29_b3")
    A 740 .dwattr $C$DW$123, DW_AT_location[DW_OP_regx 0x77]
    A 741
    A 742$C$DW$124 .dwtag DW_TAG_TI_assign_register
    A 743 .dwattr $C$DW$124, DW_AT_name("R30_b0")
    A 744 .dwattr $C$DW$124, DW_AT_location[DW_OP_regx 0x78]
    A 745
    A 746$C$DW$125 .dwtag DW_TAG_TI_assign_register
    A 747 .dwattr $C$DW$125, DW_AT_name("R30_b1")
    A 748 .dwattr $C$DW$125, DW_AT_location[DW_OP_regx 0x79]
    A 749
    A 750$C$DW$126 .dwtag DW_TAG_TI_assign_register
    A 751 .dwattr $C$DW$126, DW_AT_name("R30_b2")
    A 752 .dwattr $C$DW$126, DW_AT_location[DW_OP_regx 0x7a]
    A 753
    A 754$C$DW$127 .dwtag DW_TAG_TI_assign_register
    A 755 .dwattr $C$DW$127, DW_AT_name("R30_b3")
    A 756 .dwattr $C$DW$127, DW_AT_location[DW_OP_regx 0x7b]
    A 757
    A 758$C$DW$128 .dwtag DW_TAG_TI_assign_register
    A 759 .dwattr $C$DW$128, DW_AT_name("R31_b0")
    A 760 .dwattr $C$DW$128, DW_AT_location[DW_OP_regx 0x7c]
    A 761
    A 762$C$DW$129 .dwtag DW_TAG_TI_assign_register
    A 763 .dwattr $C$DW$129, DW_AT_name("R31_b1")
    A 764 .dwattr $C$DW$129, DW_AT_location[DW_OP_regx 0x7d]
    A 765
    A 766$C$DW$130 .dwtag DW_TAG_TI_assign_register
    PRU Assembler PC v2.3.1 Thu Dec 6 09:59:23 2018

    Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
    main.abs PAGE 15

    A 767 .dwattr $C$DW$130, DW_AT_name("R31_b2")
    A 768 .dwattr $C$DW$130, DW_AT_location[DW_OP_regx 0x7e]
    A 769
    A 770$C$DW$131 .dwtag DW_TAG_TI_assign_register
    A 771 .dwattr $C$DW$131, DW_AT_name("R31_b3")
    A 772 .dwattr $C$DW$131, DW_AT_location[DW_OP_regx 0x7f]
    A 773
    A 774 .dwendtag $C$DW$CU
    A 775

    No Assembly Errors, No Assembly Warnings

  • In reply to Peter Hong:

    Hi Peter,

    Can you set a breakpoint on “temp_short=shared_RAM[0]” in your firmware? What value does the INTGPR2 register read right before this code executes? I see that the assembly code is using address stored in R2 (or INTGPR2) to temporarily write data to during the swap. I just want to make sure this is a valid memory location.

    Regards,
    Melissa
  • In reply to melissaw:

    PRU code is running without debugger access; I don't have the debugger script that enables connection to PRU. The debugger is connected to the main processor code. Unless there is a way to set up a breakpoint from the main processor side by manipulating the registers somehow ... which I need help with.

    ------------------------

    FYI:

    PRU reset is done by writing all 0's to control register.

    PRU run is done by turning countenable bit on, followed by enable bit on.

    PRU halt is done by turning countenable bit off, followed by enable bit off.

    PRU code load is done immediately following PRU reset.

    Observations after running to "while (1)' statement:  1) Value of control register is 0x8001. 2) Program counter value is 0x0003, 3) shared ram content remains unchanged., 4) CYCLECNT and STALLCNT are 0x58F7 0x6F48 0x576A 0x6F48.

  • In reply to Peter Hong:

    Peter,

    My suggestion would be to insert a dummy while(1) loop before “temp_short=shared_RAM[0]” in your firmware. The PRU registers cannot be read by the DSP/ARM while the PRU is running. Therefore, you'll need to load and execute the PRU firmware. The PRU will then "hang" at the dummy while(1), and the DSP will need to halt the PRU (i.e. write to the enable bit) and read INTGPR2.

    For future reference, this wiki page has some tips about how to debug PRU code when a debugger is not available-- processors.wiki.ti.com/.../PRU_Debugging.

    Regards,
    Melissa
  • In reply to melissaw:

    Re-looking at the assembly code, no need to add the dummy while(1) loop. Your code never changes the value of the PRU's R2 register. You can simply run your PRU code as-is and read INTGPR2 after the PRU is halted.

    Regards,
    Melissa
  • In reply to melissaw:

    (For PRU0, the INTGPR2 register will be located at 0x01C37408.)

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