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Linux/AM5728: set UARTs 1-10 to 12M baudrate

Michael Fainstein
Intellectual 400 points

Part Number: AM5728

Tool/software: Linux

How can I configure input clock for UARTs to 192-MHz in order to set baudrate to 12M?

AM572x Technical Reference Manual says that it is possible.

I am using am57xx-beagle-x15.dts that loads clocks info from dra7xx-clocks.dtsi. All UARTs are connected to 48-MHz clock (&func_48m_fclk). There is no node for 192-MHz clock.

What are the required changes in order to set 192MHz clock o UARTs?

Thanks,

Michael

  • 0
    Guru 13660 points
    Hi Michael,

    Can you check if there is "&dpll_per_m2x2_ck" entry. This should be providing 192MHz clock.
  • 0
    TI__Guru**** 170625 points
    Hi Michael,

    It seems to me that dpll_per_m2x2_ck clock is corresponding to FUNC_192M_CLK, see AM572x TRM, Figure 3-56. DPLL_PER Overview.

    So you need to use dpll_per_m2x2_ck instead of func_48m_fclk. See also below TRM sections:

    Figure 3-45. CM_CORE_AON Overview (b)

    CM_L4PER_UARTx_CLKCTRL[24] CLKSEL

    You might also need to change below DTS entry:

    dra7.dtsi

    uart1: serial@4806a000 {
    ....
    clock-frequency = <48000000>;
    .....
    }

    Regards,
    Pavel
  • 0 in reply to Pavel Botev
    Intellectual 400 points
    UARTs have already two clocks configured : clocks = <&func_48m_fclk>, <&dpll_per_m2x2_ck>;
    I didn't realize that dpll_per_m2x2_ck corresponds to 192MHz clock.
    So, the only change that I need to do is in dra7.dtsi : set "clock-frequency = <192000000>;" for all UARTs?

    Thanks,
    Michael
  • 0 in reply to Michael Fainstein
    Guru 13660 points
    Hi,

    I think you can add an entry called clocks to UART1, example
    uart1: serial@4806a000 {
    ....
    clocks = <&dpll_per_m2x2_ck>;
    clock-frequency = <192000000>;
    .....
    }

    You can confirm by dumping register address 0x4A00 9840 and check if 24-bit is being set(if 0 48M and if 1 then 192M source). Use devmem2 tool
    # devmem2 0x4A009840

    If
  • 0 in reply to Dwarakesh Radhakrishnan
    Guru 13660 points
    Hi,

    If that is not reflecting, most likely you need to add the following in drivers/clk/ti/clk-7xx.c in function dra7xx_dt_clk_init e.g. for UART1

    rc = clk_set_parent(uart1_gfclk_mux, dpll_per_m2x2_ck);
    if (rc)
    pr_err("%s: failed to configure Mux for UART1!\n", __func__);
  • 0 in reply to Dwarakesh Radhakrishnan
    Intellectual 400 points

    Thanks a lot!

    All suggestions were very helpful and now all UARTs are using 192MHz clock.

    My final changes are as follows:

    in dra7.dtsi change clock-frequency for all UARTs to 192000000

    drivers/clk/ti/clk-7xx.c in function dra7xx_dt_clk_init following patch was applied:

    Index: drivers/clk/ti/clk-7xx.c
    ===================================================================
    --- drivers/clk/ti/clk-7xx.c (revision 9068)
    +++ drivers/clk/ti/clk-7xx.c (working copy)
    @@ -325,6 +325,8 @@
    struct clk *dsp_dpll, *dsp_m2_dpll, *dsp_m3x2_dpll;
    struct clk *atl_fck, *atl_parent;
    struct clk *iva_dpll, *iva_m2_dpll;
    + struct clk *uart_fck, *uart_parent;
    + int i;

    ti_dt_clocks_register(dra7xx_clks);

    @@ -407,6 +409,17 @@
    } else {
    pr_err("%s: failed to configure IVA DPLL!\n", __func__);
    }
    +
    + uart_parent = clk_get_sys(NULL, "dpll_per_m2x2_ck");
    + for ( i = 1 ; i <= 10 ; ++i ) {
    + char clk_name[20];
    + snprintf(clk_name, sizeof(clk_name), "uart%d_gfclk_mux", i);
    + uart_fck = clk_get_sys(NULL, clk_name);
    + rc = clk_set_parent(uart_fck, uart_parent);
    + if (rc) {
    + pr_err("%s: failed to configure Mux for UART%d!\n", __func__, i);
    + }
    + }

    return rc;
    }

  • 0 in reply to Michael Fainstein
    Guru 13660 points
    Good to know you are able to change the frequency and thanks for posting the exact patch that worked.
  • 0 in reply to Dwarakesh Radhakrishnan
    Intellectual 400 points

    This solution works, however, I am not satisfied with it. It requires to perform coordinated change in both device tree and kernel source code. I'd prefer solution that doesn't require any changes to kernel source code and is driven purely by device tree.

  • 0 in reply to Michael Fainstein
    Guru 13660 points

    It would be simple to have at one place, but given the platform dependency of clock configurations, and also device tree being very less documented, it will be difficult to exercise such flexibility any time soon. Check the no. of platform dependent code in drivers/clk to get what i am trying to say. Nevertheless linux is open source and anybody can contribute to it, if a solution makes the life easy for all.