Hello,
We are concerned about i2022 errata of AM65xx. It describes that only register DDRPHY_ZQ0PR0 can be used to program output driver impedance and on-die termination for both address/control and data.
What does this errata and workaround impact to ?
In generally, layout topologies are different between address/control and data. Therefore, we think that there is big restriction for layout design by this errata. Is this correct ?
Thanks and regards,
Hideaki