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Linux/AM3352: about PMIC_POWER_EN Low Issue

Part Number: AM3352

Tool/software: Linux

Hi SIr 

We followed AM335x SK-EVM design and connect PMIC's VRTC to RTC module of CPU. 

There is no problem if we used external power adapter to power on the system. It can boot successfully.

If we connect our CPU MB to another power board, we found the waveform about VRTC of PMIC as below which may cause PMIC_POWER_EN not be able to set high.

Does TI have any spec about the rising time of VDDS_RTC or CPU RTC's module ? or above VRTC's waveform has any risk to CPU which cause PMIC_POWER_EN abnormally ?

please advise

BR

Yimin

  • Hi Yimin,

    If I zoom in on your scope trace, it looks like VRTC is ramping with the 5V supply (before it has stabilized).  Are there any differences in the voltage input for your two input power methods?  Compare the good vs bad case on the scope- that might give some clues.

    In these situations, always verify the power sequencing matches the datasheet - take a look at section 6 of the AM335x datasheet for more information.

    Regards,

    Mike

  • Hi Sir 

    thanks for your reply.

    we found the difference is as below 

    the PMIC_POWER_EN can set high successfully (first is VRTC , second is PMIC_POWER_EN pin) in below photo.

    the   cannot set high successfully if VRTC has two rising stage  (first is VRTC , second is PMIC_POWER_EN pin)

    Do you have any suggestion why PMIC_POWER_EN cannot set high or there is any risk if VRTC has above phenomenon
    BR
    Yimin
     

  • Hi Yimin,

    We need to resolve the reason for VRTC not coming up properly.  It is hard to see from your photo, but if I zoom in, it looks like VRTC initially slews at a normal rate, then while PMIC_POWER_EN attempts to assert, VRTC slew rate decreases strongly, then VRTC resumes slewing at a normal rate after PMIC_POWER_EN deasserts.

    I would like to see another trace with the input power supply and VRTC on the same plot for both cases.  Also it would help to decrease your time division scale to see if there are other interesting transients occurring during the power-on sequencing.

    Right now my working theory is the input power supply is sagging as the processor is attempting to turn on.  If the supply looks good, I will need to refer this to the PMIC team to get you some specific help on the PMIC behavior.

    Regards,
    Mike

  • Hi Sir 

    the input power of VRTC is coming from VCC7 of PMIC. And it also has the same waveform (two stage slew rate)

    What I want to know is that "why this phenomenon cause  PMIC_Power_EN cannot set high ?  Does it have any risk ?

    Or TI suggests the VRTC Slew Rate has standard spec we should follow 

    thanks

    BR

    Yimin

  • Yimin,

    Let me take a step back here - is the AM335x still coming up properly in both cases?

    How have you implemented RTC_PORz?  This should be driven low until VRTC stabilizes, but it would seem the RTC module is out of reset before VRTC stabilizes.  We should not be trying to assert PMIC_POWER_EN before VRTC reaches the full supply level.

    You mentioned your design is based on the AM335x starter kit, and in that case, the PMIC_POWER_EN pin is left unconnected.  In this case, there will not be any issue, but would like to see if we can possibly explain this behavior.

    Regards,
    Mike

  • Hi Yimin,

    I'm in agreement with Mike, we need to see how RTC_PORz (RTC_PWRONRSTn) is implemented. It requires some delay while VRTC has time to reach final voltage. Otherwise you'll get unpredictable behavior.