OMAPL138B-EP: Shared Memory Issue

Janardan M

Part Number: OMAPL138B-EP
Other Parts Discussed in Thread: OMAPL138

Hi,

I am using OMAPL138 processor in one of the projects. In our appliaction we are trying to write data to "shared RAM" (0x8000 0000 - 0x8001 FFFF), and read it back from ARM.

When I see the memory window on CCS what ever data written is reflecting on Memory window but unable to read same data through ARM applicaion. I tried to read the data written by DSP using devmem2 and also through an application which uses mmap.

I also have a strange observation, when I manually write somedata through memory window of CCS, and read that through ARM using devmem2 every time data read from ARM is proper. I am quite ununderstandable towards this.

I am using TI RTOS on DSP side and Linux with SDK version 06_00_00_07.

Thanks,

Janardan M

over 6 years ago

0 Sahin Okur over 6 years ago

TI__Mastermind 27355 points

Hi Janardan,

I'm not a Linux expert, but have you tried opening devmem with O_SYNC? I'm wondering if it could be a cache coherency issue.

Something like:

fd = open("/dev/mem", O_RDWR | O_SYNC);

char * shared_ram = mmap(NULL, SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0x80000000);

0 Janardan M over 6 years ago in reply to Sahin Okur

Expert 1115 points

Hi Sachin,

We already are using "O_SYNC" while opening "/dev/mem". But still we are seeing issues as mentioned earlier.

What is the possible work around?

Thanks,

Janardan M

0 Rex Chang over 6 years ago in reply to Janardan M

TI__Guru 50170 points

Hi, Janardan,

I am a bit confused with your description. In the 2nd paragraph of your original post, you mentioned "When I see the memory window on CCS what ever data written is reflecting on Memory window but unable to read same data through ARM applicaion.", but in the 3rd paragraph, you also mentioned "I manually write somedata through memory window of CCS, and read that through ARM using devmem2 every time data read from ARM is proper. ".

Was the write in the 2nd paragrph using DSP application, but showed correctly in CCS memory window? If this is the case, do you have the cached display turned off in memory browser window? It seems to me that the data written by CCS can be read correctly by ARM, but not using DSP application. I wonder if the DSP writes to the correct places. If the Cache in CCS memory browser is not turned off, the memory browser displays what's in Cache, not the data in physical address.

Rex

0 Rex Chang over 6 years ago in reply to Rex Chang

TI__Guru 50170 points

Hi, Janardan,

We haven't heard back from you for more than a week, and don't know if the issue has been resolved.

I'll close this thread for now. If the issue is resolved, please click "Resolved".

Rex

0 Janardan M over 6 years ago in reply to Rex Chang

Expert 1115 points

HI Rex,

Issue is resolved.

Thanks,

Janardan

Processors

Processors forum

OMAPL138B-EP: Shared Memory Issue