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66AK2H06: U-boot cannot initialize 88E1512 Ethernet tranceiver properly

Part Number: 66AK2H06

I produced a new board with 66AK2H06 SoC based on the EVMK2H design. In the process, I changed the ethernet tranceiver from 88E1111 to 88E1512.

Next, I built a U-boot image. And loaded and ran this image on new board using CCS.

I checked that U-boot prompt appeared in PuTTY terminal. However, ethernet port does not seem to be working.

How do I modify U-boot source code to make the ethernet port work?

  • Hi,

    You should add the phy's driver in the k2hk_evm_defconfig and add the appropriate eth entries in the u-boot dts: arch/arm/dts/keystone-k2hk-evm.dts

    Best Regards,
    Yordan

  • Your answer seems to be related to the Linux kernel. I would like to get an answer for U-boot.

    Now, PHY register is accessible through the "mii" command of U-boot. However, commands such as "ping" and "dhcp" do not work properly. We modified "SRIO_SGMII_CLK" from 156.25 MHz to 125 MHz.

  • Hi,

    Latest u-boot sources from Processor SDK Linux also have dts & defconfig files, so you should have the correct properties (with regards to eth) set in them in order to rebuild the correct u-boot image.

    Best Regards,
    Yordan

  • Thank you for your advice, but I could not solve the ethernet problem.

    As you guided, I upgraded SDK from MCSDK 3.1.4.7 to Processor SDK 6.0.0.7.

    And I modified "keystone-k2hk-evm.dts" as below:

    line 175, 180 : compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";

    --> compatible = "marvell,88E1512", "marvell,88E1518", "ethernet-phy-ieee802.3-c22";

    Since my custom board changed srio_sgmii_clk from 156.25 MHz to 125 MHz, I modified "keystone_serdes.c" as below:

    static struct cfg_entry cfgs[] = {
        {
            .clk = SERDES_CLOCK_156P25M,
            .rate = SERDES_RATE_5G,
            .cmu = {
                // {0x0000, 0x00800000, 0xffff0000},
                // {0x0014, 0x00008282, 0x0000ffff},
                // {0x0060, 0x00142438, 0x00ffffff},
                // {0x0064, 0x00c3c700, 0x00ffff00},
                // {0x0078, 0x0000c000, 0x0000ff00}
                {0x0000, 0x00800000, 0xffff0000},
                {0x0014, 0x00008282, 0x0000ffff},
                {0x0060, 0x00132c48, 0x00ffffff},
                {0x0064, 0x00c3c700, 0x00ffff00},
                {0x0078, 0x0000c000, 0x0000ff00}
            },
            .comlane = {
                // {0x0a00, 0x00000800, 0x0000ff00},
                // {0x0a08, 0x38a20000, 0xffff0000},
                // {0x0a30, 0x008a8a00, 0x00ffff00},
                // {0x0a84, 0x00000600, 0x0000ff00},
                // {0x0a94, 0x10000000, 0xff000000},
                // {0x0aa0, 0x81000000, 0xff000000},
                // {0x0abc, 0xff000000, 0xff000000},
                // {0x0ac0, 0x0000008b, 0x000000ff},
                // {0x0b08, 0x583f0000, 0xffff0000},
                // {0x0b0c, 0x0000004e, 0x000000ff}
                {0x0a00, 0x00000800, 0x0000ff00},
                {0x0a08, 0x37720000, 0xffff0000},
                {0x0a30, 0x00777700, 0x00ffff00},
                {0x0a84, 0x00000700, 0x0000ff00},
                {0x0a94, 0x10000000, 0xff000000},
                {0x0aa0, 0x81000000, 0xff000000},
                {0x0abc, 0xff000000, 0xff000000},
                {0x0ac0, 0x0000008b, 0x000000ff},
                {0x0b08, 0x583f0000, 0xffff0000},
                {0x0b0c, 0x0000004e, 0x000000ff},
                {0x0a48, 0x00fd8c00, 0x00ffff00},
                {0x0a54, 0x002fec72, 0x00ffffff},
                {0x0a58, 0x00f92100, 0xffffff00},
                {0x0a5c, 0x00040060, 0xffffffff},
                {0x0a60, 0x00008000, 0xffffffff},
                {0x0a64, 0x0c581220, 0xffffffff},
                {0x0a68, 0xe13b0602, 0xffffffff},
                {0x0a6c, 0xb8074cc1, 0xffffffff},
                {0x0a70, 0x3f02e989, 0xffffffff},
                {0x0a74, 0x00000001, 0x000000ff},
                {0x0b20, 0x00370000, 0x00ff0000},
                {0x0b1c, 0x37000000, 0xff000000},
                {0x0b20, 0x0000005d, 0x000000ff},
            },
            .lane = {
                // {0x0004, 0x38000080, 0xff0000ff},
                // {0x0008, 0x00000000, 0x000000ff},
                // {0x000c, 0x02000000, 0xff000000},
                // {0x0010, 0x1b000000, 0xff000000},
                // {0x0014, 0x00006fb8, 0x0000ffff},
                // {0x0018, 0x758000e4, 0xffff00ff},
                // {0x00ac, 0x00004400, 0x0000ff00},
                // {0x002c, 0x00100800, 0x00ffff00},
                // {0x0080, 0x00820082, 0x00ff00ff},
                // {0x0084, 0x1d0f0385, 0xffffffff}
                {0x0004, 0x78000080, 0xff0000ff},
                {0x0008, 0x00010020, 0x00ff00ff},
                {0x000c, 0x02000000, 0xff000000},
                {0x0010, 0x1b000000, 0xff000000},
                {0x0014, 0x00006e78, 0x0000ffff},
                {0x0018, 0x758000e4, 0xffff00ff},
                {0x00ac, 0x00004400, 0x0000ff00},
                {0x002c, 0x00300800, 0x00ffff00},
                {0x0080, 0x00700070, 0x00ff00ff},
                {0x0084, 0x1d0f0385, 0xffffffff},
            },
        },
    };

    Then, I built a U-boot binary and ran it on my custom board.

    After that, I checked several registers related to link status as below:

    * PHY

    ** Page 0, Register 1 (Copper Link Status in Copper Status Register)

    ** Page 0, Register 17 (Global Link Status, Copper Link (real time) in Copper Specific Status Register)

    * SoC

    ** LINK in SGMII_STATUS (0x0209 0114)

    ** LINK in MDIO_LINK (0x0209 030C)

    ** LN0_SD_STATE, LN0_OK_STATE, and PLL_OK in PLL_CTRL (0x0232 BFF4)

    The link statuses we checked are displayed as normal, but ethernet related commands such as "ping" still do not work properly.

  • Ok, I have some additional questions then:
     What is the output of the ping command in your u-boot console (do you get any errors or any messagese at all)?
     

     Since you use custom board, have you followed the recommendations in the Hardware Design Guide:

     Do you comply with Table 7 SerDes Reference Clock Jitter Requirement in the above guide?

     Is ethernet working after linux kernel have booted?

    Best Regards,
    Yordan
      

  • 1. Output of the ping command:

    U-Boot 2019.01-gd0332e3-dirty (Oct 01 2019 - 04:49:50 +0000)

    CPU: 66AK2Hx SRModel: Texas Instruments Keystone 2 Kepler/Hawking EVM
    DRAM: DRAM: 2 GiB
    2 GiB
    NAND: 512 MiB
    Loading Environment from NAND... OK
    Net: 
    eth0: netcp@2000000

    Warning: netcp@slave-1 (eth1) using random MAC address - 72:3f:a6:02:11:7a
    , eth1: netcp@slave-1
    Warning: netcp@slave-2 (eth2) using random MAC address - 0e:f2:44:40:96:9b
    , eth2: netcp@slave-2
    Warning: netcp@slave-3 (eth3) using random MAC address - 5a:9a:49:17:5c:21
    , eth3: netcp@slave-3
    Hit any key to stop autoboot: 0
    => ping 192.168.10.5

    netcp@2000000 Waiting for SGMII auto negotiation to complete.. done
    Using netcp@2000000 device                                                                      <-- Froze here, then I aborted manually.

    Abort
    ping failed; host 192.168.10.5 is not alive
    =>

    2. Do you comply with Table 7 SerDes Reference Clock Jitter Requirement in the above guide?

    --> Yes.

    3. Is ethernet working after linux kernel have booted?

    --> My plan was as follows:

    1) Run U-boot using CCS

    2) Burn U-boot to NOR flash using TFTP

    3) Run and Burn Linux Kernel using TFTP

    I couldn't do step 2) because the ethernet port doesn't work, so I haven't run the Linux kernel yet.

  • Hi,

    Can you check my reply on the related thread you've opened?

    Thanks,
    Yordan

  • I checked your reply on the related thread. But apart from that, I would also like some advice on this thread issue.

  • Have you modified the board/ti/ks2_evm/board_k2hk.c file to match your customized hardware?

    Best Regards,
    Yordan