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[TDA4M] How can I access DDR from MCU domain ?

Yongsig Do
Expert 1700 points


Hi all.

I have a question after I read a session on Memory map in TRM.

From what I understand, there are three domain including MAIN, MCU and WKUP. The COMPUTE_CLUSTER0 means MAIN, and it includes both A72 and C7x as well.

It looks like DDR addresses are in only Main domain as below.

In MCU domain memory map, does the MCU_FSS0_DAT_REG0 means DDR?

Q1) If it's wrong, I was wondering how I could access DDR from another.

I know MCU(R5 core) is using 32-bit addressing. Hence it needs to use RAT. But I can't find any 32-bit DDR addresses in processors view memory map.

Best regards

Yongsig

  • 0
    TI__Mastermind 42515 points

    Hi Yongsig,

    You can use ARMSS_RAT_REGION4 from Table 2-5. R5FSS0/1 Memory Map to ramp it to NAVSS0_DDR0_MEM or NAVSS0_DDR0_MEM1.
    The address to which you ramp should be found in MAIN Domain Memory Map, MCU Domain Memory Map and WKUP Domain Memory Map tables.
    If an address is not visible the *_RAT_REGION* are used to ramp to an address from those tables.

    Please check also chapter "8.4 Region Address Translation (RAT) Module" in the TRM.

    Regards,

    Yordan