Part Number: TDA2P-ACD
Hi, ALL.
We're planning to connnect 8 cameras to TDA2P-ACD using only csi-ports (csi_0 with 4 DL config and csi_1 with 2 DL config), please, see picture below.
(1) Is it possible to connect 8 cameras using both csi-ports only (with dual UB962)?
(2) We already tested UB962 with TDA2P using only csi_0 port in 4 DL mode. It works fine with 4 cameras!
Now we want to try UB962 (4 cameras) with csi0_port in 2 DL mode.
Which steps we need to do for using 2 DL connection?
We have problems.
Here is sample vision_sdk code. We changed '_4LANES' constant to 'SYSTEM_VIFW_2LANES', but 4 blank screens was observed.
{SENSOR_SONY_IMX224_CSI2,
{1u,{0x36,0x37,0x38,0x39},{ 0x20, 0x21, 0x22, 0x23 }, TRUE, SYSTEM_VIFW_2LANES, SYSTEM_VIFM_SCH_CSI2,
SYSTEM_CSI2_RAW12 /* CSI2 DataFormat*/, 0 /*Virtual Channel Id*/,0, /* IsCSIPostEnable Required */
{TRUE /* isCplxCfgValid */,
{{FALSE, 2u}, /* Clock Lane */
{FALSE, 1u}, /* data1Lane */
{FALSE, 3u}, /* data2Lane */
{TRUE, 4u}, /* data3Lane*/
{FALSE, 5u}},/* data4Lane */
800u /* csi2PhyClk */ }}},
WriteI2C(UB962, 0x33, 0x35); /* .CSI_CTL, CSI_ENABLE (Enabled), CSI_CONTS_CLOCK (Enabled), CSI_ULP (0x00), CSI_LANE_COUNT (Using 2 Lanes), */
Then we tried to change '800u' csi2PhyClk to '1600u' (or to '1200u)'. But any value greater than 1000 causes an assertion failure in 'DDR_check' code, see below. (1ns check)
/* Get DDR clock period in nS */
ddrClkPeriod = (Float32)((Float32)csi2Clk * (Float32)1000000U);
ddrClkPeriod = (Float32)((Float32)1U / ddrClkPeriod);
ddrClkPeriod = (Float32)(ddrClkPeriod * (Float32)1000000000U);
GT_assert(VpsHalTrace, ((uint32_t)ddrClkPeriod > 0U));
temp = ((Float32)20U / ddrClkPeriod);
thsTerm = (uint32_t)temp;
Is it possible to configure TDA2P csi-port in 2 datalane mode using UB962?
Thanks in advance.
Best regards.
