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TDA4M PCIE clock

Hsieh YuLin
Prodigy 225 points

HI

Refer to spec the PCIE clock can refer to HFOSC_CLK if it is one of 19.2,20,24,25,26,27,31,25,100 MHz, so we also can remove external clock generator,right? 

Thanks a lot

B.R

Y.L

  • 0
    TI__Genius 15120 points

    Hi YuLin,

    Yes, Serdes can generate the 100-MHz clock needed for PCIe operation. The list of clocks you mentioned is the reference clock for Serdes internal PLL. Software must configure all muxes and PLLs for PCIe mode (100-MHz clock out).

    Note that the 100-MHz PCIe clock distribution (on the PCB) must be carefully evaluated. Please refer to PCIe standard specs for the 100-MHz clock distribution variants.

    Regards,

    Stan