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TDA4VM: TDA4VM

Part Number: TDA4VM

Hi experts:

I am starting to develop with the TDA4 EVM and download the SDK for Linux at http://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/index_FDS.html 

and trying to Booting from QSPI (OSPI1 port with 4 data line) . In the Linux SDK, there is only use case for booting form OSPI0 but not QSPI. Could you please give me 

some guide for Booting form QSPI ( like Dip Switch setting, offset for storing tiboot3.bin,sysfw.itb,tispl.bin,u-boot,img)?

Thanks

Hutian

  • Hi Hutian,

    Hardware has support for QSPI boot.
    Currently SDK has support for OSPI and hence you saw the documentation. I can try out QSPI
    and share the changes in couple of days.

     Any particular reason why you trying QSPI and not OSPI?

    - Keerthy

  • Hi Keerthy:

    I would say many thanks for your help, in our new project, we want to save more GPIO pins for controller then choose the QSPI BUT not OSPI to store the bootloader. May be the other reason is the budget or the restrict for our Flash supplier.

    B&R

    HuTian

  • Hi HuTian,

    Okay. I am working on this. I will be sharing patches soon.


    Thanks,
    Keerthy 

  • Hi HuTian,

    I am attaching a zip file with 7 patches that you need to apply on u-boot reposiroty.

    You need to build the u-boot repository with 7 patches to get the qspi support.

    Here are the steps that you need to follow:

    1) Build the tispl.bin, tiboot3.bin & u-boot.img and save them in tftp folder.
    2) Use the pre built binaries in the SDK and do a SD boot and come to u-boot prompt.
    3) Burn them using the below command.(It is exactly same memory layout and addresses as OSPI):

    sf probe 1:0 /* For the second instance OSPI1/QSPI */
    dhcp;
    setenv serverip local-ip-addr;

    tftp ${loadaddr} tiboot3.bin; sf update $loadaddr 0x0 $filesize; tftp ${loadaddr} tispl.bin; sf update $loadaddr 0x80000 $filesize; tftp ${loadaddr} u-boot.img; sf update $loadaddr 0x280000 $filesize; tftp ${loadaddr} sysfw.itb; sf update $loadaddr 0x6C0000 $filesize

    Once the burning to QSPI step is successful. Turn off the j7-evm and change the dip switch settings to QSPI as below:

    SW3:

    1        2      3      4       5       6      7      8      9      10
    Off     On   On   On    Off    Off    On   Off   On    Off

    S9:
    1        2      3      4       5       6      7      8
    Off     Off   On   Off    Off    Off    Off   Off

    SW8:

    1        2      3      4       5       6      7      8
    Off     Off   Off   Off    Off    Off    Off   Off

    The above dip switch settings is for QSPI Boot on J7.

    Once you power on you should see something like Below:


    U-Boot SPL 2019.01-00008-g9f60be5255 (Feb 27 2020 - 10:16:42 +0530)
    SYSFW ABI: 2.6 (firmware rev 0x0013 '19.8.0-v2019.08-3-g8644f (Terri')
    Trying to boot from SPI
    Loading Environment from MMC... spl: unsupported mmc boot device.
    sdhci@4f80000 - probe failed: -19
    spl: unsupported mmc boot device.
    sdhci@4fb0000 - probe failed: -19
    *** Warning - No MMC card found, using default environment

    Loading rproc fw image from device 3 not supported!
    Loading rproc fw image from device 3 not supported!
    Starting ATF on ARM64 core...

    NOTICE: BL31: v2.1(release):ti2019.02-rc4
    NOTICE: BL31: Built : 21:52:20, Dec 12 2019
    I/TC:
    I/TC: OP-TEE version: ti2019.02-89-ge5a8779-dev (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-re4
    I/TC: Initialized

    U-Boot SPL 2019.01-00008-g9f60be5255 (Feb 27 2020 - 10:17:06 +0530)
    Detected: J7X-BASE-CPB rev E3
    Detected: J7X-VSC8514-ETH rev E2
    Trying to boot from SPI


    U-Boot 2019.01-00008-g9f60be5255 (Feb 27 2020 - 10:17:06 +0530)

    SoC: J721E PG 1.0
    Model: Texas Instruments K3 J721E SoC
    Board: J721EX-PM2-SOM rev E6
    DRAM: 4 GiB
    Flash: 0 Bytes
    MMC: sdhci@4f80000: 0, sdhci@4fb0000: 1
    Loading Environment from MMC... OK
    In: serial@2800000
    Out: serial@2800000
    Err: serial@2800000
    Detected: J7X-BASE-CPB rev E3
    Detected: J7X-VSC8514-ETH rev E2
    Net: eth0: ethernet@046000000
    Hit any key to stop autoboot: 0
    =>
    =>

    Let me know if this works for you.qspi-j7.tar

    Best Regards,
    Keerthy


  • HuTian,

    Also Attaching the binaries that are working for me in qspi boot.

    Regards,
    Keerthy

    qspi-j7-binaries.tar

    - Keerthy

  • Hi Keerthy,

    Thanks for your efforts on my question, it works on my side that i have rebuild the u-boot on my local PC by applying your PATCHs.

    May i ask the reason about the comment "Set MCU_PLL1_HSDIV_CTRL4 HSDIV to 17  Workaround for the sysfw divisor change"?

    B&R

    HuTian

  • Hi HuTian,

    Glad that works for you. Regarding that comment it is needed because system firmware is changing
    that divider for QSPI clock. So that is for my internal tracking and getting it into system firmware.

    Regards,
    Keerthy

  • Hi Keerthy,

    As you mention, setting the divider register directily is a way to workaround it. Modifing the "system-firmware-image-gen-2019.08"(SYSFW) to generate a new sysfw.itb also can achieve the same result, am I getting it right?   A beginner for TDA4VM :)

    B&R

    HuTian

  • Hi HuTian,

    Yes that is correct. Since this impacts only at R5 SPL level we can do it at SPL level.

    - Keerthy