TDA4VM: mcu xip crash

ronaldo ding(DJI)

I tested norflash XIP based on the demo:can_profile_xip_app of sdk:psdk_rtos_auto_j7_06_02_00_21.

when i run my own app firmware , the core crashed abnormally at the init stage.

I think the reason of this problem is that the instruction data fetched from the OSPI bus is incorrect.

Look one example shown in the below pictures:

The insrtuction at address:0x50171174 is: LDR sp, [PC, #-0x7C], this instruction is used to setup the stack-pointer of abort mode(R13_ABT).If this instruction is executed correctly, R13_ABT should be 0x41c6bc6c(value of address:0x50171100).however, its value is 0xE3CDD007(value of address:0x501711bc).

it is obvious that the instruction :0x50171174 LDR sp, [PC, #-0x7C] is executed abnormally.

when i setup a hardware breakout at this instrcution 0x50171174 , it can be right and the value of R13_ABT is correct.

This problem is tough to me

over 5 years ago

0 Sunil Kumar M S over 5 years ago

TI__Genius 12330 points

Hi Ronaldo,

Is software always crashing at this point 0x50171174 only?

Also let me know whether the value of R13_ABT is correct if you put a breakpoint after this instruction i.e at location 0x50171178.

If possible, please provide your application linker command file also.

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

in fact, the crash point is random after power up, the example shown in my picture is just a typical one. I tried to reappeared it but failed.

This is another example, the instruction at 0x5016f92c:ldr r0 [r6, r0] crashed due to an invalid address value-R6:0xE18222383

if i add a breakpoint at the position where r6 is last changed: address 0x5016f8bc. it,s value will be normal, and the program will not crash at 0x5016f92c:ldr r0 [r6, r0] .it seems the offset of PC is also wrong in this case

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

Please check in your application if you are writing to the XIP memory which can lead to crash.

Also provide your linker command and map file to analyze further.

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

can you give me your e-mail. i will send you the bin map and elf file which is a simplest program with a bootup and while(1) main function.

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Please send your map file and linker command file(lds) also.

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

I have sent you the email, pls check it.

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

I believe you are using SBL Cust Image and following binaries are flashed properly.

Also please let me know you are running baremetal application and not using TI RTOS.

CUST SBL: sbl_cust_img_mcu1_0_release.tiimage @0th location
sysfw.bin: sysfw.bin @40000
sbl_boot_xip_entry: sbl_baremetal_boot_xip_entry_j721e_evm_mcu1_0TestApp_release.appimage @a0000
App: Your Application Bin file br1609_ecu_v2.bin @e0000

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

yes, all the binaries are flashed properly.and the app is a baremetal application

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

We have not verified can profile xip app in baremetal mode.

Can you please let me know what is your application use case?

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

sorry i can not tell you the use case of our project. we will use autosar os later, but now no os is used. and the firmware i sent you is a minimum program system with main function of while(1), however it crashed all the same.

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi,

Can you add your firmware/code into mcusw can profile xip application,use can profile xip linker command file and test your usecase?.

If it works fine then we can confirm that there is no issue in your application and XIP in NO OS mode is having issue which needs to be dubug further.

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

Hi,Sunil

it is not easy to add my firmware/code into mcusw can profile xip application, because it has a different makefile system. I tried to use the can profile xip linker command file to replace the former one, however the firmware crashed all the same.

The source files i used are all from the TI psdk(boot&startup arch related). the compiler version:ti-cgt-arm 15.12.7.LTS.

have you tested the firmware i send you, could it work well?

Regards,

ronaldo.ding

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

Our boot code owner suggested to do the following changes and try to execute.

Please override mpu_init with dummy.

Please refer pdk\packages\ti\boot\sbl\example\k3MulticoreApp\sbl_smp_r5.asm

If you want to do it in c instead, define a dummy __mpu_init function.

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

Hi,Sunil

I override mpu_init with dummy, however the application crashed too, and ccs failed to connect mcu r5f_0 core.

maybe some resources and memory address accessed in my application should be configured by mpu. maybe it can be done in sbl_boot_xip_entry.

btw, how is going with your verification of xip in baremetal mode?

Regards,

ronaldo.ding

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

Our CSL StartUp module owner has suggested following to be done.

"it is likely that some stale data in Dcache – can you do a D cache invalidate and see if it makes a difference – before you start running?"

API to be used is CSL_armR5CacheInvalidateAllDcache

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

Hi,Sunil

I tried to call CSL_armR5CacheInvalidateAllDcache at the beginning of _c_int00, but had no use.

Regards,

ronaldo.ding

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

Can you run this application sbl_boot_xip_test. This is a test case demonstrating booting an XIP application from OSPI flash which is baremetal.

Please refer below documentation.

http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#id101

4.6.3.3.7. Testing the SBL (sbl_baremetal_boot_xip_test_*_mcu1_0TestApp_release.xer5f.bin)

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

it seems the baremetal here means that the sbl uses no os,because i don't find the application code.

by the way, it has been 2 weeks since our last meeting. have you finished the baremetal demo in xip mode?

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

We will reproduce this issue internally with XIP expert and rootcause the issue. We have binaries provided by you over the email.

As he is working in Dallas time, will update you once we figure out the issue.

Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

Hi Sunil,

There is another problem about norflash xip .the code execution efficiency in XIP mode is low. I tested the cpu performance using the PMU(performance monitor unit) module.

In terms of MIPS(million instructions per second), ddr code(with cache enabled) is 449， while norflash xip code (using the can_profiling_xip application) is 66.

it means, the code execution efficiency of XIP is only 1/6 of ddr execution.

Have you test the code execution of XIP,and how is the result ?

Regards,

ronaldo.ding

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

We do have a performance numbers measured by running can profiling application in XIP and in Internal memory.

I will share this data via email.

Regarding your measurement can you let me know the number of cache misses in both the applications you ran?

Regarding earlier issue, Were you able to fix this crash issue?

Yesterday we had a debug session reproducing the issue and have following suggestions.

1) Can you put a while(1) loop in dummy __mpu_init function which you override it.

After putting while(1) loop, flash the binary, connect to RSF core and make sure it is hitting this while(1) loop and see where it is crashing from that point.

You can add following code: Once you hit this point, change the variable to 0 and execute further. Please note close all memory window in CCS while connecting to R5F core.

volatile uint32 myTemp = 0xDEADBEEF;

while(myTemp);

2) Can you share the binaries,axf files with us so that we can also check here?

3) Please let me know your available timing w.r.o DALLAS time to have a debug session with our XIP expert there.

Thanks And Regards,

Sunil Kumar M S

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

when i use the pmu, i find the cache miss counter is incorrect, so the cache miss rate is unknown.

I will try the debug method in your last reply

0 ronaldo ding(DJI) over 5 years ago in reply to Sunil Kumar M S

Intellectual 365 points

Hi Sunil Kumar M S

I tried the method mentioned in your last reply. and my application can run successfully.

the dcache need to be invalidated and cleaned at the entrance of program. and cache should not be disabled.

The code execution efficiency of XIP is about 70% of DDR execution.

Thanks And Regards,

Ronaldo

0 Sunil Kumar M S over 5 years ago in reply to ronaldo ding(DJI)

TI__Genius 12330 points

Hi Ronaldo,

That's Good to know. Thank you for the update and marking this thread resolved.

Thanks And Regards,

Sunil Kumar M S

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TDA4VM: mcu xip crash