Part Number: PROCESSOR-SDK-DRA8X-TDA4X
Tool/software: TI C/C++ Compiler
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Part Number: PROCESSOR-SDK-DRA8X-TDA4X
Tool/software: TI C/C++ Compiler
Hi,
There seems to be some transfer error. Can you please get complete TR response and share it?
Rgds,
Brijesh
Hi,
It seems there is a read error. Are your addresses all valid for L2 and DDR location? Could you please double check?
Could you please share your L2 and DDR location?
Rgds,
Brijesh
Hi,
How can i check the location is valid ?
DDR location : 0xd405ed00
L2 location : 0x008xf000
BR,
Hi,
I mean, can you connect CCS and try to access both of these location from CCS memory window?
Rgds,
Brijesh
Hi,
I did some tests:
1. Using same DDR address and L2 address,i copy data from DDR to L2 by CPU(use memcpy()) and it work well.
-- Proof of DDR location and L2 location are valid.
2. Using same DDR source-address and another DDR destination-address,i copy data from DDR to DDR by UDMA and it work well.
-- Proof of my usage of UDMA is correct.
Do you have other suggestions !
BR,
Hi,
Can you try running same memcpy example from some other core? I just want to see if the L2 address is system address or local to the core..
Regards,
Brijesh
Hi,
I find a definition in file cslr_soc_baseaddress.h
#define CSL_C66SS0_VBUSP_CFG_PBISTCFG_BASE (0x4d80000000ULL)
I fix the error by adding offset 0x4d80000000 to L2 address(0x4d80000000+0x80000) .
It seems work well ,but i want to know If there are official user guides for fuctions and definitions for specific features;
Thanks you very much !
BR,
Hi,
I am sorry i did not get question.
System address of this L2 memory should be part of the TRM. Could you please check it?
Regards,
Brijesh
Hi,
I found the reason of my error.
My L2 memory address is not system address,so I add an system address offset to my L2 address and the UDMA work well now.
Thank your !
BR,