AM5728: Time synchronization between cores

Gonzalo Vara

Part Number: AM5728

Hello,

We are proposing to use the SITARA AM57x cores in the following way:
• SDK Linux running on Cortex-A.
• SDK RTOS on the rest of the cores (Cortex-M and DSP C66x).

Normally our devices can be synchronized from different external sources: NTP, PTP, IRIG, communications protocols, etc.

I would like to know what would be the best mechanism to keep in sync all the cores available in SITARA (A15, M4, DSP).

Thank you for your suport.

over 5 years ago

0 Gonzalo Vara over 5 years ago

Intellectual 420 points

Hello,

Could you give me a hand with this?

Thank you very much in advance.

Best regards,

Gonzalo

0 Stanley Liu over 5 years ago in reply to Gonzalo Vara

TI__Guru 50045 points

Could you use GP Timer to provide global time for all cores?

0 AnBer over 5 years ago in reply to Stanley Liu

TI__Mastermind 30655 points

Hi Stanley,

Do you know if Linux (for A15) and the TI RTOS (for C66x) use the same GP timer? Or is it two separated GP Timer?

From your previous comment do you mean using a 3rd GP timer to synchronize by interrupt the C66x and A15? Or would it be better to use the IPC mechanism?
https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Foundational_Components_IPC.html

I have posted as well the question at the following link so that the TI RTOS team can answer:
https://e2e.ti.com/support/processors/f/791/t/915870

0 Stanley Liu over 5 years ago in reply to AnBer

TI__Guru 50045 points

Linux and RTOS typically have their own GP timers for OS scheduler.

For my previous comment referring to a global time across Cores, one dedicated GP timer can be used and directly accessed by all cores. It can provides global time. However, this doesn't provide "synchronization" mechanism.

For synchronization across cores, IPC will be required.

I suggest you can close the other E2E thread and keep the discussion in this one since that post also comes to our team anyway.

Regards,

Stanley

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AM5728: Time synchronization between cores