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AM6548: udam half adn full duplex feature ?

Part Number: AM6548

Hi

In the TRM for AM6548 the section on UDMA 10.1.2.3 talks about half and full duplex. It seems that there is no explanation or how this is configured in the transfer request

Also in the trigger section it has Global0 trigger versus local can you explain that also please? It is not clear in the TRM. 

Thanks

  • Half vs Full duplex,

    This is with respect to a TR specification.

    Half duplex mean TR describes only one end of the memory layout, the other end is a peripheral

    Here in the "Transfer Request Template fig 10-49" - word 0 to word 7 is used.

    Full duplex means both ends of the memory layout are described, i.e word 8 to word 15 is also used.

    Trigger,

    A DMA channel can be trigger via signal. This signal can be as below,

    - Global trigger, here the trigger is a event ID, a DMA channel can optionally emit a event ID at programmed DIMx boundary, this event ID can be used to trigger a another DMA channel. Each DMA channel has a unique event ID, thus one DMA channel can trigger another DMA channel, this allows to do equivalent of "chaining" in EDMA.

    - Local trigger is the same concept, but now some supported peripherals can toggle a internal pin to trigger a DMA channel. This is not so much used by UDMA.

    regards
    Kedar

  • Hi Kedar

    thanks for the explanation, i am still confused on the half and full. You said that for half they only use word 0 to 7. I found out how to pick half and full, it depedns on the TR type so type 0 to 3 is for half duplex this is only for peripherals.

    So another question is which peripheral is it reading from? There is only a read address so i assume you want to read from the memory and write it to the peripheral correct? If that is correct then how to pick which peripheral? I can't find a way to pick a peripheral so if you can tell me that would be great.

    on the trigger 

    "- Global trigger, here the trigger is a event ID, a DMA channel can optionally emit a event ID at programmed DIMx boundary, this event ID can be used to trigger a another DMA channel. Each DMA channel has a unique event ID, thus one DMA channel can trigger another DMA channel, this allows to do equivalent of "chaining" in EDMA."

    How does the software trigger works then? Is it a global or local trigger? 

    Thanks

  • "So another question is which peripheral is it reading from? There is only a read address so i assume you want to read from the memory and write it to the peripheral correct? If that is correct then how to pick which peripheral? I can't find a way to pick a peripheral so if you can tell me that would be great."

    Actually it not say source in the description, basically is it read address when doing DMA from memory to peripheral and it is write address when doing DMA from peripheral to memory. Unfortunately, it not so straightforward to pick a peripheral.

    I recommend to look at below documents to understand overall UDMA architecture. Maybe that will make the concept clear. To see it translates to exact register programming looking at UDMA driver and a peripheral driver like say SPI or CSI2 would help.

    We have this app note

    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/pdk_jacinto_07_00_00/packages/ti/drv/udma/docs/Migrating_Applications_from_EDMA_to_UDMA_using_TI-RTOS.pdf

    And this training/overview on UDMA
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/pdk_jacinto_07_00_00/packages/ti/drv/udma/docs/UDMA_Overview.pdf

    Software trigger is like local trigger, it toggles some pins internal based on a MMR setting.

    Let me know if you need further clarifications.

    regards
    Kedar

  • ok i like the EDMA to UDMA that does explain certain things which it was not in the TRM on the half duplex.

    Thanks