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AM6526: Timing between CLK and CMD signal of MMCSD in 1.8V

Part Number: AM6526


Hi,

 

The customer has a question and request regarding the timing of CLK and CMD immediately after changing from 3.3V to 1.8V of SD card I/F (MMCSD1).

 

When they tested SD card read/write, they found that four SD cards of 8 cards didn’t work in 1.8V mode even though these worked fine in 3.3V. As a result of their investigation, they found no response from SD card immediately after changing from 3.3V to 1.8V even though AM6526 sends a command (CMD2) to SD card.

 

They confirmed a timing of CLK and CMD signals. (See the attached document.)

Usually, CMD signal is detected at CLK rising. There is no problem on this timing in the case of 3.3V, but CMD timing was changing immediately after changing to 1.8V such like CMD was changed at CLK rising in spite of not changing the frequency from 25MHz. From this behavior, set up time and hold time was not enough.

(This timing is the same between OK card and NG card.)

It seems that working fine or not depends on unique characteristics of each SD card.

 

They think that the above problem is caused by the timing between CLK and CMD signal at 1.8V.

 

They’re using Processor SDK Linux driver of am65xx.

mmcsd driver is not modified.

The followings are modified in MMCSD_socSetInitCfg.

- supportedBusVoltages

- switchVoltageFxn

- supportedModes

Then, they have a question and request as follows;

 

1. After changing to 1.8V, immediately CMD behavior was changed like CMD signal was toggled at CLK rising. This is different from AM6526 timing specification in attached file. This is problem, right ?

 

2. Could you share any sample code and document with them to control changing 3.3V to 1.8V correctly ?

 

CLK and CMD signal of MMCSD.pptx

Thanks and regards,

Hideaki

  • Hideaki-san,

    This is a known observation and register configurations can be updated to workaround this issue.  I will check with the SW team to understand where the latest release can be found.

    Just to verify, which PG is the customer using?

    Thanks & Regards,

    Shiou Mei

  • Hi Shiou Mei,

    Thanks for your reply. That's good info. that you have a workaround for this issue. They're using PG2.0.

    Let me correct the driver info. They're using the following drivers in Processor SDK RTOS 06_03_00_106, not Linux, but they're not using SYS/BIOS as bare metal.

    - Diag code
        \pdk_am65xx_1_0_7\packages\ti\board\diag\mmcsd

    - mmcsd drivers
        \pdk_am65xx_1_0_7\packages\ti\drv\mmcsd
        \pdk_am65xx_1_0_7\packages\ti\csl\src\ip\mmc

    Please give them a workaround.

    Thanks and regards,
    Hideaki

  • Hideaki-san,

    To align this thread with what was discussed in email, please try with the following register settings.   

    Initialization should use the same register setting as Default Speed.  Once in 1.8 V, SDR12 register settings should be set.

    Have a great day!

    Best Regards,

    Shiou Mei