Tool/software: Code Composer Studio
Hai sir,
I am using TMS320C6748 DSP and ARTIX FPGA. The communication between DSP to FPGA is only universal parallel port.
In ARTIX side proper start and clock other bits getting only data is not getting.
In chipscope the DATA:0xff,0x00 getting
I am using below 'c' code. I am using only Polling Method
volatile int16_t xmit_buffer[64] = //as required by UPP DMA controller
{
512,562,612,661,708,753,796,837,874,908,938,964,985,1002,1014,1022,
1023,1022,1014,1002,985,964,938,908,874,837,796,753,708,661,612,562,
512,462,412,363,316,271,228,187,150,116,86,60,39,22,10,2,
0,2,10,22,39,60,86,116,150,187,228,271,316,363,412,462
};
#pragma DATA_ALIGN(recv_buffer,64)
volatile int16_t recv_buffer[64] =
{
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0
};
uint32_t UPP_start()
{
// upp_config_t config;
// UPXS2_t * UPIS2r = (UPXS2_t *)&(UPP->UPIS2);
// UPXS2_t * UPQS2r = (UPXS2_t *)&(UPP->UPQS2);
// uint32_t retVal = ERR_NO_ERROR;
uint32_t i;
UPP_UPPCR &= ~0x08; // Disable UPP
while(UPP_UPPCR & 0x80); // Wait for DMA idle
UPP_UPPCR |= 0x10; // Reset UPP
for(i=0;i<200;i++); // Keep in reset
UPP_UPPCR &= ~0x10; // Enable UPP
/*UPP Configuration */
UPP_UPCTL = 0
| 0 << 26 // 8-bit data format - Channel A
| 0 << 25 // 8-bit interface
| 0 << 18 // 8-bit data format - Channel B
| 0 << 17 // 8-bit interface
| 1 << 2 // Dual channel mode
| 2 << 0; // Duplex Mode 0. Channel A receives and Channel B transmits
UPP_UPICR = 0x00000000; // Channel B divisor = 15
UPP_UPIVR = 0xFFFF0000; // Set idle values
UPP_UPTCR = 0x00; // Set channel transfer thresholds
UPP_UPDLB = 0x2000; // No digital loopback
UPP_UPIES = 0x00; // No Interrupts
UPP_UPPCR = 0x08; // Enable peripheral
while(1) // Infinite Loop for RX and TX
{
UPP_UPQD0 = (uint32_t)&recv_buffer; // DMA RX buffer base
UPP_UPQD1 = 0x00200002; // 32 lines of 2 bytes
UPP_UPQD2 = 0x00000002; // Line Offset Address = Byte Count => Data buffer is contiguous block in memory
while(UPP_UPQS2 & 0x02){}; // Wait for RX to complete
UPP_UPID0 = (uint32_t)&xmit_buffer; // DMA TX buffer base
UPP_UPID1 = 0x00200002; // 32 lines of 2 bytes
UPP_UPID2 = 0x00000002; // Line Offset Address = Byte Count => Data buffer is contiguous block in memory
while(UPP_UPIS2 & 0x02){}; // Wait for TX to complete
}
}
Screen shot chipscope
