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Corrupt boot ROM on C6747

Marcus Berglund1
Prodigy 70 points

Other Parts Discussed in Thread: OMAP-L137

Hi,

We have received the first spin of our custom board based on the C6747. A weird behaviour has been discovered as we were not able to run using JTAG from CCS5. Everything loads fine including the PLL setup and SDRAM setup using the suggested EVM6747 GEL-file.

BUT

When CCS releases the application it does not reach main. It stops at weird places in the memory. When reseting the CPU we find that the reset vector in boot ROM, starting at 0x7000000, is filled with rubbish.

All registers seems fine and loaded with the data that the GEL-file executed. All voltages are measures with very little ripple and the reset is released nicely when all voltages are stable. The clock is measured to the 24 MHz as defined.

BOOT-pins are all set to boot in emulator mode.

SDRAM is filled with the appropriate data that can be read and written from within CCS.

Can someone explain how the boot ROM memory can be corrupted? Or is it not loaded propely? Any suggestions are more than welcome.

Thanks

  • 0
    TI__Guru* 85865 points

    Hi Marcus

    Once you connect to JTAG , can you provide the output from the debug gel file

    http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files

    What application are you running? Is it running from on chip memory or from SDRAM? Have you tried other examples from PSP package or something from quickStartrCSL? How do you know that the ROM memory is corrupted?

    Regards

    Mukul

  • 0 in reply to Mukul Bhatnagar
    Prodigy 70 points

    Hi,

    I will run that GEL-file and get back with the result.

    We have tried running several test projects in the PSP package such as the gpio etc. All same result.

    I don't know for a fact it is corrupt, but it looks completely different from the ROM of the OMAP-L137 that we have been developing on. The assembly instructions does look weird and the branch addresses all have 0x005.... which is not a valid memory in the memory map.

    Our application should run from SDRAM but we have tried with test projects that only resides in the 0x1180000 area and 0x8000000 area. Same result...

    It seems as the boot loader is getting lost somewhere and not running valid code.I have checked the mirrored boot area 0x1170000 as well and it looks the same as 0x7000000.

    Thanks!

  • 0 in reply to Marcus Berglund1
    Prodigy 30 points

    This is the output from the debug script.

     

    C674X_0: GEL Output: ---------------------------------------------

    C674X_0: GEL Output: |               BOOTROM Info                |

    C674X_0: GEL Output: ---------------------------------------------

    C674X_0: GEL Output: ROM ID: d800k20578191

    C674X_0: GEL Output: Silicon Revision UNKNOWN

    C674X_0: GEL Output: Boot pins: 62459

    C674X_0: GEL Output: Boot Mode: UART1 (0x0000F3FB)

    C674X_0: GEL Output:

    ROM Status Code: 0x000000A6

    Description:C674X_0: GEL Output: Error code not recognized

    C674X_0: GEL Output:

    Program Counter (PC) = 0xC000AEA8

    C674X_0: GEL Output:

     

    Thanks

    Marcus

  • 0 in reply to Marcus Berglund2
    TI__Guru* 85865 points

    Hi Marcus

    It would be good to provide the complete output from the GEL file (I believe you can do that by doing Run All).

    The ROM ID and version not being readable looks to be not right.

    It might be good to share the lot trace info for these devices too.

    Do you have several boards behaving this way or just this board? Are you sure the RVDD pins have been properly applied with power ( I think it should be fine, given you think you are able to load the code to L2 etc fine).

    Regards

    Mukul

  • 0 in reply to Mukul Bhatnagar
    Prodigy 70 points

    Hi Mukul,

    You are correct! The RVDD-pins are not connected properly. This seems to be the root cause of the issue.

    Best regards

    Marcus