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AM572x NAND in U-boot

krinali shah
Expert 1290 points
Other Parts Discussed in Thread: AM5728

Hello All,

We have a NAND interface on our customized board, based on AM5728. NAND is not supported in AM57xx evm. 

I want to know that how can i initialize NAND interface in UBL & U-Boot's code?

I need to know few parameters like,

CONFIG_SYS_NAND_ADDR

CONFIG_SYS_NAND_BASE

CONFIG_SYS_MAX_NAND_DEVICE                                  1

How can I calculate "CONFIG_SYS_NAND_BASE" parameter? - It is a base address of what?

And also suggest me some board file, from U-Boot code, which does have NAND configuration and processor architecture is similar to AM57xx. So that I can use it as a reference.

Help me with this.

Thanks,

Krinali Shah

  • 0
    TI__Guru**** 393215 points
    I will forward this to the software team.
  • 0 in reply to Biser Gatchev-XID
    Expert 1290 points
    Hi Biser,

    It is bit urgent.
    I will appreciate if someone can address this issue quickly.

    Thanks,
    Krinali Shah
  • 0
    TI__Guru**** 161600 points

    Hi,

    You could take a reference from am437x to see what you need to add in your board config file (am57xx_evm.h) to get the NAND initialized. It is the closest to AM57xx. 

    krinali shah said:
    How can I calculate "CONFIG_SYS_NAND_BASE" parameter? - It is a base address of what?

     

    The answer to this is in ti_armv7_omap.h (which is included in am57xx_evm.h):  

    /*
    * GPMC NAND block. We support 1 device and the physical address to
    * access CS0 at is 0x8000000.
    */
    #ifdef CONFIG_NAND
    #define CONFIG_NAND_OMAP_GPMC
    #ifndef CONFIG_SYS_NAND_BASE
    #define CONFIG_SYS_NAND_BASE 0x8000000
    #endif
    #define CONFIG_SYS_MAX_NAND_DEVICE 1
    #define CONFIG_CMD_NAND
    #endif

    As for the board file pinmux settings board/ti/am57xx/board.c & board/ti/am57xx/mux_data.h, you need to call the gpmc init function & if necessary add the GPMC pinmux settings in the mux_data. 

    Hope this helps. 

    Best Regards, 
    Yordan

  • 0 in reply to Yordan Kovachev
    Expert 1290 points
    Thanks a lot Yordan for your help.
    I just have a small doubt on this.
    Can you guide me where this BASE_ADDRESS "0x8000000"I can find in TRM/datasheet of AM572x?

    Thanks,
    Krinali Shah
  • 0 in reply to krinali shah
    TI__Guru**** 161600 points

    Hi,

    As explained in the header comments this is a GPMC CS address.  So have a look at GPMC chapter: 15.4 General-Purpose Memory Controller

    For address mapping see Section 2.2 L3_MAIN Memory Map:  

    "• GPMC space:

    Eight independent GPMC chip-selects (CS0 to CS7) are available in the first quarter (Q0) of the addressing space to access NOR/NAND flash and SRAM. The chip-selects have a programmable start address and programmable size (up to 128 MiB) in a total memory space of (Q0) 1GiB, but limited now to 512 MiB."

    and Table 2-1. L3_MAIN Memory Map. 

    Hope this helps. 

    Best Regards, 
    Yordan

  • 0 in reply to Yordan Kovachev
    Expert 1290 points

    Hi Yordan,

    Thanks for the information.

    Just for my understanding, from the L3_MAIN Memory map table, I could figure out that we can use any address space, between 0x0000_0000 0x1FFF_FFFF, ie 512MiB, as  a base address. For now, the address 0x8000000, will start the base address location from "128Mib", in chip select address range region. This will be sufficient as my NAND chip is of 256MiB in size. But, if I want to connect 512MiB NAND chip, should I use BASE_ADDRESS as "0x0000_0000", than only I can accomodate 512MiB, size in Chip select's address space range.

    Please correct me, if my understanding is wrong.

    Thanks,

    Krinali Shah

  • 0 in reply to krinali shah
    TI__Guru**** 393215 points
    NAND devices are NOT memory-mapped. NAND addressing is done through the data interface. You can interface any size NAND to the GPMC, using the smallest possible CS region of 16MB.