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tms320c6657: EMIF16 Boot Unreliable

Part Number: TMS320C6657


Our project runs reliably via the emulator (runs every time without fail and runs for days without a single hiccup so we know the DSP hardware itself is reliable). However when running the same code from FLASH sometimes the DSP will not boot. Some DSPs are worse than others (i.e. some will boot 9 times out of 10, others will boot only twice out of 10 tries). Once the DSP boots it's fine but sometimes it just won't boot. We've traced the issue to the the first function (an LCD init routine) that executes from DDR3 (our code is very large with a mixture of functions in internal memory and DDR3). When the DSP fails to boot we see it has aborted when trying to call this function.  It never even enters the function as we put an LED diagnostic at the start and the LED doesn't light.

The DSP is booting via a NOR FLASH via EMIF16.  The boot failure is from a cold (power-up) boot.  If the DSP fails to boot the project can be loaded via the emulator and runs fine.

Any clues as to what might be causing this? It is random in nature so it's got to be something to do with a power-up condition.

  • Hi,

    Have you followed the power up sequence described in the device Data Manual:
    1. Section 6.3.1 Power-Supply Sequencing
    2. Section 6.3.1.1 Core-Before-IO Power Sequencing
    3. Section 6.3.1.2 IO-Before-Core Power Sequencing

    Is it possible to measure the power-up sequence with a scope?

    Best Regards,
    Yordan
  • Yes, power supply sequencing is correct.
  • Can you clarify, where is the DDR configuration done during the EMIF16 boot? Is it done from the ROM bootloader or the application. When the boot fails and you run the code over an emulator, can you confirm that you are not running any GEL files that may re-initialize any of the clocks or DDR.

    Is there activity on the EMIF pins when the boot fails. Can you confirm that the EMIF NOR is powered up before SOC ROM bootloader is running. We have seen on some EMIF NAND boot usecases, a CPU reset after POR reset solved the issue due to NAND not being powered up  when EMIF was initialized. Can you try an experiment, to when the EMIF boot fails and you connect to the DSP, issue a CPU Reset from CCS and let the core run (CPU reset will put the core back in ROM) and you get a second attempt to boot.

    Can you indicate the the value of DSP program counter when  it fails. Is it still in DSP ROM memory or has it passed control to the application. Another question, do you have some boards where this works 100% of the time or all your boards are showing these symptoms to a different degree. 

    Regards,

    Rahul