AFE7444EVM: AFE7444 EVM locking issue

Hi ,

I am not able to see  PLLCLKLD LED lit up When I program it to Mode4 also.. The error LED is lit up PLLREFLED and ALARM LED lit up. 

Can you tell me the Debug process to know what is the fault. as i saw ALARM LED is AND to many signals.

With regards,

Ganesh Singh

Hi ,

Thanks for your suggestion,

Let me clarify some points so we are on the same page. I am using this EVM for a year and We have brought 9 AFE7444 EVM. 

All the other EVMs are working fine with standard configuration.

We are in the process of Production of some boards with this IC also.

We face this issue in one of our boards like we are not able to See the PLL clock signal. 

We observed this behavior on one of the EVMs also.  I am trying to go on the root cause of it. 

Now on the testing setup.

1. I know there is LMK04828 on board when We choose Mode from GUI the LMK04828 PLL lock LED goes green.  What's Happening on the EVM also.

Please see the picture attached to this Email.

2. I have checked the parameters also like EFUSE status, PLL page 0 values, etc.

I want you to help me in debugging this problem like which REG I shd read and any Debug procedure to know the root cause.

Please note that I am using AFE744 EVM stand-alone.

Hope I am clear with my point.

Last I have seen all videos a year back those are good information but don't tell you about debugging.

With Regards, Ganesh

Just an update. I am getting this Alarm LED because RXC_DSA1PD and RXD_DSA1PD pins are High on the EVM. I Probed it. 

Now please help me with further Steps to Correct it as I am not applying anything on RX or TX input or output. they are open.

Hope this Helps.

With regards,

Ganesh Singh

Hi Ganesh,

The first step here is to check if AFE PLL is locked. In section 2.1.13.2 of AFE74xx_Programmers_Guide_slau793a.pdf, PLL programming sequence is given.

Can you check if pll_lfvolt readback is between D3 to D5 as expected? 

Regards,

Vijay

HI ,

I am not able to locate D3 and D5.. but I am able to verify at the following location 

The value of the above tables was verified and found correct.

With regards,

Ganesh

Hi Ganesh,

When reading pll_lfvolt you should receive a decimal value between 3 and 5. Can you check what the value you readback?

Were you able to follow the PLL programming sequence in section 3.1.13.2 of the Programmers Guide?

Regards,

David Chaparro 

hi ,

The VALUE od REG 0x3E = 0x07.

Please let me know if you need anything else.

With regards,

Ganesh Singh 

Hi Ganesh Singh,

AFE internal PLL is out of lock if pll_lfvolt is 7.

What is the DAC frequency you are using? Is it different from 8847.36 MHz?

Are you reading back pll_hvco and programming that value+4 to register 5E as shown in programmer's guide? (refer to below picture)

Can you try increasing value programmed to register 5E in steps of 1 and read back pll_lfvolt? pll_lfvolt expected to decrease from 7 and PLL should lock for when right value is programmed in register 5E

Regards,

Vijay

Hi Vijay ,

I am trying for 8847.36 MHz.

The 0xBC = 0x45. So I 5E i tried 49, 50, 51 and 52. It does not change lock . 

Please let me know some fix steps as i dont know whats is happening to this IC.

With regards,

Ganesh

Hi Ganesh,

Ideally when PLL is locked, pll_lfvolt should be between 3 and 5 at room temperature. If this value is stuck to 0 or 7, it means PLL loop filter voltage is saturated.  

Can you probe and verify that reference clock to AFE is as expected? 

Regards,

Vijay

Hi ,

that I checked before also. its quite well like 368.64 MHz.

Please let me know other aspects or can we arrange a call to resolve the issue very quickly like a remote session or something. you can access the board also.

With regards,

Hi Ganesh,

Earlier I said register 5E value in TXPLLDIGP0 page should be increased for pll_lfvolt readback to go down. I remembered this incorrectly. I tested on the EVM to find that value in register 5E should be decreased. Can you please try reducing this value and see if there is any change in pll_lfvolt readback?

On the EVM, I see that if 5E is programmed to 0, pll_lfvolt readback is 0. You can start with this test to see if pll_lfvolt is being affected. 

Regards,

Vijay

Hi Vijay ,

I changed the 5E from 00 ---52 . The pll_ifvolt(3E) remains 07 only. It's not changing from it .

With regards,

Ganesh Singh

Hi Ganesh,

This is not expected behavior from AFE. One last thing you can check is if all the DC-DC and LDO output voltages on the EVM are as expected. You can use probe points (marked as PPxx on EVM) to measure these voltages. Beyond that, I can't think of anything else that can cause this issue. 

Regards,

Vijay

Hi Vijay,

I measured it in the beginning as now also. All the power supply seems ok. 

I Noticed that ATEST pin is also not showing any status. like When I changed the 3D register to 7 and try to measure. it always shows 0. can you get some clue from it.

With regards,

Ganesh 

Hi Vijay,

Thanks for the update.

In Programing Manual also not mentioned E-fuse Clock Frequency. 

Can you please let us know that also?

With regards,

Ganesh Singh