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AFE7950: Digital interface questions

Part Number: AFE7950
Other Parts Discussed in Thread: LMK04832,

Hello, I plan on using the AFE7950IABJ on my current project. May I please get some clarifications on the following questions? Thank you.

1. Is the REFCLK+/- differential clock input have an 100 ohm internal (differential) termination across +/-? The datasheet states that the SYSREF+/- clock, SYNCBIN+/-, and SYNCBOUT+/- signals have an input/internal termination of 100 ohms, but no info on REFCLK. Is an external 100 ohm resistor provision (DNI) recommended on these interfaces just in case?

2. I also intend on using the TI LMK04832 part for LVDS clock output distribution for the REFCLK and SYSREF. The signals are all 0.1 uF AC coupled, would that be a fair approach, or should pull-up/pull-down provisions (say 50 ohms resistors) also be recommended?

3. If I want to operate the AFE7950 in sleep mode by configuring with SPI, would it still be recommended to provision hardwired pull-ups/downs to 1.8V (with the pull-down installed to maintain a default state) on the SLEEP GPIO signal? 

4. Are there recommended default settings (pull-ups/downs) for the ALARM1/2 outputs or are they needed if I can configure via SPI?

 

  • Hi Jack,

    1. REF clock has internal 100 ohm termination. Refer to below DS snip:

    2. REF clock can be AC coupled. But SYSREF common mode has to be set externally.

    3. SLEEP pin can be left unconnected if you plan to configure SLEEP mode through SPI.

    4. ALARM can also be left open if you don't plan on using these. 

    Please refer to 'AFE79xx_Schematic_layout_checklist.xlsm' on AFE79xx secure folder (www.ti.com/mysecuresoftware) for more details on which connections are needed.

    Regards,

    Vijay