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Interpolation in GC5016 in DDC mode

ahsan tanvir
Prodigy 140 points

as i am using gc5016 in ddc mode their is an issue, in gc5016 there is no resampler so i have to use  rinf_zpad as i have to zero pad in order to achieve interpolation, but i am unable to achieve interpolation although i am using rinf_zpad and sysncronization of zero pad is also in sync with cic cfir and others,

in my case i have to do as following

1) first zero pad by 1 to achieve interpolation of 2

2) then downconvert by 5 at cic (not at cfir because cfir decimation cant be greater thant cic)

 i am doing so in order to achieve decimation by 2.5  ,  as fractional decimation is not possible directly so i have to interpole by 2 then decimate by 5, please help in this regard i shall be tankful to you, looking forward for reply

  • 0
    TI__Mastermind 37500 points

    Hello,

    The GC5016 can zero pad the Ain,Bin,Cin,Din by an integer amount.  The ADC output must meet the Tsu and Thi of the higher speed Clock input for the GC5016.

    If you wanted to interpolate an ADC sampling at 50Msps, you would use a 100Mhz DDC clock, you would zero pad by a value of 1, you would operate the GC5016 in split IQ

    mode.  You would have a CIC decimation of 1, and a PFIR decimation of 5.  The IQ output rate would be 20Msps complex.  The PFIR filter would have to be designed to have typically 50 - 80% bandwidth,

    Regards,

    Radio Joe

     

  • 0 in reply to Radio-Joe
    Prodigy 140 points

    Hellow,

    dear Radio-Joe still my propblem is not solved so i have opted to send you complete code , i interpolated by 2 and decimated by 2 so theoratically speaking result should be same as with no decimation, but unfortunately its not the same,

    case 1 : without decimation or with decimation working fine

    case2 : with interpolation using decimation as well or only interpolation without decimation i m unable to get results so basically i m unable to achieve interpolation

    case 2 is not working for me i shall be thankful to u for your help i have paste my script file below please kindly help me i shall be thankful to you...

    ###############################################
    # GC5016 DDC mode
    # clock rate 118.8e6 for ddc where as in ADC its 59.4e6, fck=2*fadc becaise interpolate by 1
    # one to one bit accurate
    # AIn->AOut, channel B ,C ,D are set to zero output
    ###############################################

    ##############################
    # standard print file items
    ##############################
    print table
    print gc101
    print analysis
    print debug

    ##############################
    # setup for 4 channels DDC
    ##############################
    mode ab receive
    mode cd receive

    ##############################
    # clock rate of GC5016
    ##############################
    rinf_zpad 1     # padding 1 zero

    fck 118.8       # sampling frequency fck=2*fadc 

    splitiq 1 # split i q mode
    ##############################
    # startup sync
    ##############################
    sync_mode 9
    soB_sync 4

    #################################
    # channel A setup for DDC
    #################################
    channel 0

    #################################
    # IO Interface
    # 16 bits A port Real Input
    # 16 bits A port Real output
    #################################
    # full rate, A input port
    rin_rate 1
    rin_cmplx 1
    mix_rcv_sel 0

    # I output port A
    bits 16
    pins 16

    ###################################
    # For independent free run GC5016
    # channel syncs are set for oneshot
    ###################################
    # channel decimation sync
    cic_sync 4     # one shot
    fir_sync 4    

    freq_sync 4 
    phase_sync 4
    nco_sync 4  
    dith_sync 0
    flush_sync 0 
    gain_sync 4   
    coef_sync 4  
    pwr_mtr_sync 4
    sck_sync 4   
    rinf_zpad_sync 4

    pwr_mtr_on 1

    # refer to AGC settings Note
    agc_mode 0     #
    agc_cf 3      # crest factor is set as -3dB
    agc_tc 1000
    agc_freeze 1   # AGC is on


    ###################################
    # decimate by 40
    ###################################
    #bypass_cic 1
    #bypass_fir 1
    #cic_bypass 1

    cic_dec 2

    fir_dec 1


    ###################################
    # fir tap file
    ###################################
    fir_cmplx 0
    fir_coef ahsan.taps

    ###################################
    # tuning frequency is 10 MHz
    ###################################
    #freq_lsb 0x0
    #freq_mid 0x4000
    #freq_msb 0x5555   # 48 bits Hex expression for the desired tuning frequency, not for "freq", refer to datasheet p.16
    freq -10.6       # freq = - (fck - desired tuning frequency ), negative for DDC

    #routf_iqmux 0
    #################################
    # channel B setup for DDC test
    #################################
    channel 1
    copy_channel 0
    #toutf_bo 0
    #B Input port
    #cic_rcv 0
    mix_rcv_sel 1

    #################################
    # channel C setup for DDC test
    #################################
    channel 2
    copy_channel 0
    #toutf_co 0
    #C Input port
    #cic_rcv 0
    mix_rcv_sel 2

    #################################
    # channel D setup for DDC test
    #################################
    channel 3
    copy_channel 0
    #toutf_do 0
    #D Input port
    #cic_rcv 0
    mix_rcv_sel 3

    ################################# End of Code

     

  • 0 in reply to ahsan tanvir
    TI__Mastermind 37500 points
    Hello,
     
    I will try to setup an example with the GC5016 SEK, with zero-pad later this week, and forward the results.
    case 2 only interpolation with a decimation of 1, is not a normal case.  If you want this feature, you
    would use the DUC mode.
    In you example, the initial decimation was 2.5.  The suggested approach is
       split_iq 1
       rin_cmplx 0 - normally we use a real ADC and zero-pad the input
       rinf_zpad of 1
       rinf_zpad_sync 4
       cic_dec 1
        pfir_dec 5
    note: the ADC output must have good Tsu and Thi input to the GC5016 at the 118.8Msps rate
    the PFIR is designed for a sample rate of 118.8, the PFIR passband typically less than 80% BW
    the .anl file output from cmd5016 lists the valid PFIR configurations, in this case, we have 5 clocks per
    output sample, with a symmetric filter, with odd number of coefficients, 159 taps. 
    Regards,
    Radio Joe
    Regards,
     
    Radio Joe