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AFE7444EVM: Received Signal is just duplicate of first 65536 samples in HSDC Pro

guhn hyeok ko
Prodigy 10 points
Part Number: AFE7444EVM
Other Parts Discussed in Thread: AFE7444

Hi,

I am using AFE7444 EVM with TSW14J57.

When I increase number of receiving samples for take the longer signal, HSDC Pro doesn't show the continuous data but the duplicate of first 65536 signal.

I'd appreciate it if you could let me know why this is happening.

 

  • +1
    TI__Genius 10875 points

    Hi Guhn Hyeok Ko,

    When using TSW14J57 with a transceiver (both ADC and DAC simultaneously), on-board DDR memory can only be used either for DAC pattern or ADC data capture. By default, DDR is used for DAC pattern and FPGA internal BRAM is used for ADC capture. FPGA BRAM has a limited capture depth which is only 65536 for the RX_Mode4. 

    To capture larger data depth, we can load a different firmware that uses DDR for ADC capture and BRAM for DAC pattern. We will test this on our bench and get back to you. 

    Regards,

    Vijay