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AFE7900EVM: Query regrading CPLD( complex programmable logic device) interfacing with AFE900evm

Part Number: AFE7900EVM
Other Parts Discussed in Thread: AFE7900,

Hello support team,

I have found out that some of the AFE7900 functions such as GPIO, RXA/B/C/D LNA bypass signals, SPI, JESD sync out, Alarm output signals, gain swap , TDD etc. interfacing with CPLD. and I have not found any details how CPLD work with AFE7900EVM inside the conifg guide or any other document?

Could you please provide some details on CPLD's importance in AFE7900EVM Board? For all the configurable parameters setup through latte GUI, Is CPLD part of the configuration? or is it only used for IO interfacing?

In short, I want to understand the purpose of CPLD with AFE7900EVM configuration? In terms of which GUI is working with CPLD?

  • Maitry,

    We are looking into this.

    Regards,

    Jim

  • Hi Jim,

    Ok, Thank you for the response. Awaited your support on the above case.

  • Hi Maitry,

    As the AFE79xx has more GPIO pins than GPIOs pins available on FMC of TI data capture FPGA EVMs, we added a CPLD on the EVM. Idea of adding this was to be have an option control AFE GPIOs. But we never used the CPLD. In fact recently the CPLD parts went out of stock and we are building EVM without installing the CPLD.

    SPI is driven through USB. JESD sync in/out and TDD signals are connected to FMC. Some more GPIO pins are also connected to FMC in case you need to evaluate any GPIO functionalities. RX LNA bypass and Alarm pins are connected to test points. AFE supports connecting (multiplexing) any functionality to any available GPIO. So GPIOs connected to FMC can be used to evaluate most features. 

    Regards,

    Vijay

  • Hi Vijay, 

    From your response, What I understand is below. and please find queries.

    1) For AFE7900 interfacing with ZCU102 , we could use FPGA only to configure all AFE7900 GPIO functionality. 

    2) The current procured AFE7900EVM has CPLD or not? Actually The schematic given has all the interfacing with CPLD only. So, I request you to please share the updated Schematic. As For the AFE7900EVM, I am taking the secure folder given schematic . it would be helpful if you could provide the updated one. So that, there will not be this kind of confusion.

    3) If current procured AFE7900EVM has CPLD , then also, it is just optional, and nothing is programmed on CPLD , right? 

    4) So, Latte GUI , python scripting is not dependent on CPLD , I assume. 

    Kindly support and provide clarification.

  • Hi Maitry,

    1) Yes, the FPGA can be used to program the AFE and AFE GPIO functionality. 

    2) The latest AFE7900EVMs do not have the CPLD populated because of the part shortage. The schematic that is provided in the secure folder can still be used in this case as the only schematic change there would be is to write 'DNI' next to the CPLD.

    3) The CPLD is optional and is not used for anything by default.

    4) The Latte python scripting is not dependent on the CPLD.

    Regards,

    David Chaparro

  • Hi David,

    Thanks for the Response. Can you please more elaborate on below, It would be great.

    we are planning to design our own board with simultaneous low frequency similar 4 channels , by using the same Balun. And we want to use the same GUI on our board also (having AFE7900 IC). So, in order to use the same scripting and GUI as used in evaluation board, what are the possible ways ? 

    awaited your positive response.

  • Hi Maitry,

    To use the EVM control software, EVM schematic should be copied as it is with only baluns updated. 

    Regards,

    Vijay

  • Hello,

    Thanks for your response.