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AFE7906: AFE7906

Rajashekar Etankar
Prodigy 120 points
Part Number: AFE7906
Other Parts Discussed in Thread: AFE7920, AFE7950, AFE7900,

We have lot of reference sch as reference with AFE7900, AFE7920,and AFE7950 to design AFE7906 and updated design is AFE7920 is developed in 2022 jul.

We want to make phase balance with 3 degrees , is that required to maintain  group length matching between sysref and device clock when connecting with FPGA to LMK. ?

Regards,

Etankar Rajashekar

  • 0
    TI__Mastermind 38890 points

    Hi Etankar,

    In order to synchronize multiple AFE devices, you need to length match between sysref pairs to the AFE devices and the same goes for the device clock. You can use the LMK delay features in order to help with this.

    However, you don't need to length match between the sysref and device clock from LMK and to the FPGA, but typically most users will match their length.

    Also, between any clocking or sysref P/N pair we would advise to match these lengths, +/-5 to 10mils would be fine.

    Regards,

    Rob