AFE7900EVM: Using AFE7900EVM without FPGA

Danilo A.

Part Number: AFE7900EVM
Other Parts Discussed in Thread: AFE7900,

Hi Team,

Please see our customer's inquiry below.

I am using the AFE7900 EVM but I do not have any FPGA,If I plug in an analog signal, how do I get the sampled spectrum. Can you provide some solutions without using FPGA？

Regards,

Danilo

over 3 years ago

0 Vijayendra Varma Siddamsetty over 3 years ago

TI__Genius 11115 points

Hi Danilo,

Without an FPGA, ADC output data cannot be captured to perform FFT and get signal spectrum.

However, there's one possible use-case without an FPGA. ADC output data can be looped back as DAC input data when AFE configured in repeater mode. For more details on this mode refer to this app note: https://www.ti.com/lit/an/sbaa525/sbaa525.pdf

Regards,

Vijay

0 Danilo A. over 3 years ago in reply to Vijayendra Varma Siddamsetty

TI__Mastermind 34185 points

Hi Vijay,

Thank you for your response. According to our customer, he wants to know if the repeater mode only support the RXD to TXD because he use it today with RX A but did not receive a signal from TX A.

Regards,

Danilo

0 Vijayendra Varma Siddamsetty over 3 years ago in reply to Danilo A.

TI__Genius 11115 points

Hi Danilo,

Repeater mode is available for all all channels. Input to Rx A should be close to NCO frequency set for RxA and output from TxA will be around NCO frequency set for TxA. Please ask customer to select input frequency accordingly.

I'm attaching a repeater mode script verified on AFE7900EVM. In this script RxA NCO is set to 5400 MHz. Rx input frequency should be 5400+/- 200MHz and Tx output will be at the same frequency.

Fullscreen repeaterMode_onboardClk_RX_TX_500M_FB_disabled.py Download

##############		Read me			##############
# Repeater mode. No FPGA board need to be connected. 

sysParams=AFE.systemParams
sysParams.__init__();sysParams.chipVersion=chipVersion

setupParams.skipFpga = 1 # setup FPGA (TSW14J56) using HSDC Pro 
##############		Top Level			##############
sysParams.FRef			= 491.52
sysParams.FadcRx		= 2949.12
sysParams.FadcFb		= 2949.12
sysParams.Fdac			= 2949.12*3
sysParams.externalClockRx=False
sysParams.externalClockTx=False
													
##############		Digital Chain		##############

		#####	RX	#####
sysParams.ddcFactorRx	=	[6,6,6,6]				#DDC decimation factor for RX A, B, C and D
sysParams.rxNco0		= 	[[5400,5400],			#Band0, Band1 for RXA 
							[500,500],        		#Band0, Band1 for RXB 
							[2500,2500],        	#Band0, Band1 for RXC 
							[1800,1800]]        	#Band0, Band1 for RXD 

		#####	FB	#####
sysParams.fbEnable		=	[False,False]
sysParams.ddcFactorFb	=	[6,6]					#DDC decimation factor for FB 1 and 2
sysParams.fbNco0		= 	[500,1800]				#Band0 for FB1 and FB2 

		#####	TX	#####
sysParams.ducFactorTx	=	[18,18,18,18]			#DUC interpolation factor for TX A, B, C and D
sysParams.txNco0		= 	[[5400,5400],			#Band0, Band1 for TXA 
							[500,500],        		#Band0, Band1 for TXB 
							[2500,2500],        	#Band0, Band1 for TXC 
							[1800,1800]]        	#Band0, Band1 for TXD


##############		JESD		##############

		#####	ADC-JESD	#####
sysParams.jesdSystemMode= [3,3]
													#SystemMode 0:	2R1F-FDD						; rx1-rx2-fb -fb
													#SystemMode 1:	1R1F-FDD						; rx -rx -fb -fb
													#SystemMode 2:	2R-FDD							; rx1-rx1-rx2-rx2
													#SystemMode 3:	1R								; rx -rx -rx -rx
													#SystemMode 4:	1F								; fb -fb- fb -fb
													#SystemMode 5:	1R1F-TDD						; rx/fb-rx/fb-rx/fb-rx/fb
													
sysParams.jesdTxProtocol= [0,0]						# 0 - 8b/10b encoding; 2 - 64b/66b encoding 
sysParams.LMFSHdRx		= ["44210","44210","44210","44210"]
													# The 2nd and 4th are valid only for jesdSystemMode values in (0,2).
													# For other modes, select 4 converter modes for 1st and 3rd.
sysParams.LMFSHdFb		= ["22210","22210"]

sysParams.rxJesdTxScr	= [True,True,True,True]
sysParams.fbJesdTxScr	= [True,True]

sysParams.rxJesdTxK		= [16,16,16,16]
sysParams.fbJesdTxK		= [16,16]

sysParams.jesdTxLaneMux	= [0,1,2,3,4,5,6,7]			# Enter which lanes you want in each location. 
													# For example, if you want to exchange the first two lines of each 2T,
													#		this should be [[1,0,2,3,5,4,6,7]]

		#####	DAC-JESD	#####
sysParams.jesdRxProtocol= [0,0]
sysParams.LMFSHdTx		= ["44210","44210","44210","44210"]
sysParams.jesdRxLaneMux	= [0,1,2,3,4,5,6,7]			# Enter which lanes you want in each location.
													# For example, if you want to exchange the first two lines of each 2R
													#		this should be [[1,0,2,3,5,4,6,7]]
sysParams.jesdRxRbd		= [4, 4]
sysParams.jesdRxScr		= [True,True,True,True]
sysParams.jesdRxK		= [16,16,16,16]

		#####	JESD Common	#####
	
sysParams.jesdABLvdsSync= True
sysParams.jesdCDLvdsSync= True
sysParams.syncLoopBack	= False	#JESD Sync signal is connected to FPGA
sysParams.jesdLoopbackEn = True #Enable JESD STX to SRX loopback

##############		GPIO		##############
sysParams.gpioMapping	= {
						'H8': 'ADC_SYNC0',
						'H7': 'ADC_SYNC1',
						'N8': 'ADC_SYNC2',
						'N7': 'ADC_SYNC3',
						'H9': 'DAC_SYNC0',
						'G9': 'DAC_SYNC1',
						'N9': 'DAC_SYNC2',
						'P9': 'DAC_SYNC3',
						'P14': 'GLOBAL_PDN',
						'K14': 'FBABTDD',
						'R6': 'FBCDTDD',
						'H15': ['TXATDD','TXBTDD'],
						'V5': ['TXCTDD','TXDTDD'],
						'E7': ['RXATDD','RXBTDD'],
						'R15': ['RXCTDD','RXDTDD']}

##############		LMK Params		##############
lmkParams.pllEn			= True
lmkParams.inputClk		= 983.04 # Valid only when lmkParams.pllEn = False
lmkParams.lmkFrefClk	= True
setupParams.fpgaRefClk	= 245.76 # Should be equal to LaneRate/40 for TSW14J56

##############		Logging		##############
logDumpInst.setFileName(ASTERIX_DIR+DEVICES_DIR+r"\Afe79xxPg1.txt")
logDumpInst.logFormat=0x0 #Modify to 0x1 to save register scequence to log file. Script takes more time to execute.
logDumpInst.rewriteFile=1
logDumpInst.rewriteFileFormat4=1
device.optimizeWrites=0
device.rawWriteLogEn=1

device.delay_time = 0
#-------------------------------------------------------------------------------------------------#
AFE.deviceBringup()

AFE.TOP.overrideTdd(15,3,15)	# bit-wise; 4R,2F,4T

Regards,

Vijay

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AFE7900EVM: Using AFE7900EVM without FPGA