Other Parts Discussed in Thread: AFE8000
Hello, I am new to JESD204C.
(For references, I have experiences with JESD204B subclass 1/0 using Xilinx IP core)
I want to confirm my knowledge on JESD204C is correct.
Subclass 1 of JESD204B requires the sync signal with separate pins.
However, subclass of JESD204C doesn't require it. In the AFE8000EVM,
no pin of FMC connector is connected to the GPIO_C5, C6, V5, V6, E5, D5, T5, U5
(With my knowledge, these pins are used for sync pin according to your datasheet).
With this in mind, first I concluded that this EVM can use only JESD204c subclass 1.
But, later then, I noticed that GPIO pins in AFE8000 can be configured for sync in/out.
To implement JESD204B subclass 1 in the AFE8000EVM, which pins can be used for sync signal for interfacing ZCU102 board?
