DAC38RF82: SERDES and lane configuration

Yao-Hua

Part Number: DAC38RF82

Hi, Expert :
I have one question about DAC38RF82. We swap lane connection between
FPGA and DAC because of layout. The SERDES lane connection diagram is illustrated
as the below and need help to confirm the SERDES and lane configuration.
I captured the SERDES and lane configuration and please correct
them if any setting is wrong.

Yao-Hua

over 2 years ago

+1 jim s over 2 years ago

TI__Guru* 91947 points

Yao,

The mapping should look as follows:

Regards,

Jim

0 Yao-Hua over 2 years ago in reply to jim s

Prodigy 120 points

Hi, Jim :

The mapping of SLICE1 seems to be reasonable, but there is something suspicious with SLICE0 mapping.

We didn't swap the SERDES lanes for RX0 to RX3 and only swap the SERDES lanes for RX4 to RX7.

In my opinion, the mapping should look as follows.

How do you think about this? Please advise & thanks.

Regards,

Yao-Hua

+1 jim s over 2 years ago in reply to Yao-Hua

TI__Guru* 91947 points

Yao-Hua,

You are correct. That was a mistake on my part. This is the mapping used on our EVM which swaps lanes 0-3. What you are showing is what you should be using.

Regards,

Jim

RF & microwave

RF & microwave forum

DAC38RF82: SERDES and lane configuration