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AFE7900: How to send a custom pattern on ADC?

Mubashira Zaman
Prodigy 20 points
Part Number: AFE7900


For AFE7900, there is a function called adcRampTestPattern() that sends a ramp signal on ADC. However, I want to send a custom pattern on ADC. Is there any method available to do this?

  • 0
    TI__Mastermind 18041 points

    Hi Mubashira,

    Unfortunately the AFE does not support a custom test pattern mode. The supported test patterns are ramp, alt 0/1, or short transport layer test. These can be seen from register 0x109 in the ADC_JESD page, given in the AFE79xx Register Set document.  

    Regards,

    David Chaparro 

  • 0 in reply to David Chaparro
    Prodigy 20 points

    Hi David,

    Can you explain what the short transport layer test means? What kind of test this is and what pattern is sent in it?

    Also if I want to send a pattern of alternate 0's and 1's, or perform a short test, how can I do it in Latte? Which function call can i use? I have analyzed the tiAfe79_jesd.c file in the CAFE library and was unable to find a function that does this task.

    Regards,

    Mubashira Zaman

  • 0 in reply to Mubashira Zaman
    TI__Genius 10885 points

    Hi Mubashira,

    A SPI programmed 16-bit sample is repeated when transport layer short test pattern is enabled. 

    As these test patterns are commonly used, Latte or CAFE functions are not implemented for JESD alternate 0 and 1 pattern and short test pattern. Direct register programming can be done to enable these patterns. We will verify and send you the register sequence that can be done from Latte for this by next Monday. 

    Regards,

    Vijay

  • 0 in reply to Vijayendra Varma Siddamsetty
    Prodigy 20 points

    Hi Vijay,

    Thank you for addressing my questions.

    I'll be looking forward to receiving the register sequence for enabling these patterns. 

    Regards,

    Mubashira Zaman

  • 0 in reply to Mubashira Zaman
    TI__Mastermind 18041 points

    Hi Mubahsira,

    The below lines can be ran to configure the ADCs into the alt 0/1 pattern. To change the pattern you can change the value you are writing to registers 0x109-0x10B. For example to enable the ramp pattern you would write 0x2 instead of 0x4. 

    device.writeReg(0x16,0x3)	#Open both ADC_JESD pages
device.writeReg(0x109,0x4)	#RxA/RxC
device.writeReg(0x10A,0x4)	#RxB/RxD
device.writeReg(0x10B,0x4)	#Fb1/Fb2
device.writeReg(0x16,0x0)	#Close both ADC_JESD pages

    Regards,

    David Chaparro