Hello,
looking for reference design for Xilinx Versal devices.
The following is an answer from David Chaparro to another member of the forum :
"...We are now supporting reference designs for the Versal dev kit, we use a VCK190, and TI data converters. Please put in a request for the TI204c-IP, using the link below, and we will work with you to get a working reference design for your mode and device. .."
I got the JESD / 204c-IP files a few days ago, but there was/is not Versal ref-design in the zip I got.
How can I get it ?
Thanks,
Rami
