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AFE7769DEVM: SYNCINA/B/C/D and SYNCOUTA/B/C/D

Alder Lim
Prodigy 190 points
Part Number: AFE7769DEVM
Other Parts Discussed in Thread: AFE7769D, AFE8000EVM

Hi TI Team,

I saw SYNCINA/B/C/D and SYNCOUTA/B/C/D is connected on AFE7769D at AFE7769DEVM while it is not for AFE8000EVM.

Is it a hard requirement for AFE7769D in order for the Serdes/JESD to work properly? 

Thanks,

Best regards,
Alder

  • 0
    TI__Guru* 78274 points

    Hello Alder,

    The physical SYNCIN and SYNCOUT LVDS (or CMOS, configurable via software) is a strict requirement for the JESD204 B protocol, 8b/10b encoding. If your end FPGA is JESD204 B protocol, then you must use the SYNCIN and SYNCOUT as handshaking signal for link establishment.

    These signals are optional for the JESD204C standard. For example, we have Intel Agilex based reference designs that utilizes JESD204C 64/66B based encoding without needing these physical handshaking signals.

    Please let us know how we can support you further on this

    -Kang

  • 0 in reply to Kang Hsia
    Prodigy 190 points

    Thanks Kang,