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TI204C-IP

xiao zhang
Prodigy 70 points

Hi, 

    Ti engineer,

    I'm learning about “KCU105_AFE79xx_64b66b_12Gbps” reference design。In my project，I imported the “TI_204c_IP_xilinx.svp” file form TI204C-IP-Release-v1.11-LATEST.zip. 

when i finished upgrading  the gth_64b66b_xcvr IP ， the synth give error about " [Synth 8-448] named port connection 'qpll1lock_out' does not exist for instance 'xcvr_inst' of module 'gth_64b66b_xcvr' ["D:/ZXL/FPGA_Pro/Ku040_Test/Ku040_Test.srcs/sources_1/new/gth_64b66b_rxtx.sv":192]" .  Some module interfaces are not generated。

       Is the XCKU040  FPGA chip not supporting 64b66b encoding? But the number of GTH of XCKU040 is enough。

      What is the reason for this?

    thanks.

 

  • +1
    TI__Genius 14791 points

    Hi Xiao,

    This error looks be caused by an issue with a setting in the Transceiver Wizard. Can you open the Transceiver Wizard and in the 'Structural Options' search for and enable the 'qpll1lock_out'?

    Once this has been done you should no longer see this error.

    Regards,

    David Chaparro

  • 0 in reply to David Chaparro
    TI__Intellectual 1720 points

    Hi Xiao,

    To add to the points that David has mentioned, whenever you upgrade the IP using Vivado, the tool can remove all the configuration settings of the transceiver. If you are porting the reference design to a different FPGA, it is recommended that you do the following:

    1> Open the original reference design in a separate project. 

    2> Open the transceiver wizard in this project

    3> Create a separate project for the new FPGA and finish the upgrade step.

    4> Open the transceiver wizard in the new project

    5> Manually check if all the settings of the original project have been retained in the new project

    Unfortunately, this seems to be a Vivado related limitation, as the tool can remove configuration details from the transceiver.

    Regards,

    Ameet