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AFE7900EVM: SPI INTERFACE

Part Number: AFE7900EVM
Other Parts Discussed in Thread: AFE7900

Hi 

1) We have established the link between ADC(AFE7900EVM) and FPGA (Stratix 10 EVM) through GUI and then we tried SPI interface with SPIB1 with Hardware changes R82, R84, R85 & R44 are shorted, but we couldn't get the SDOUT from the ADC. So, after referring below forum, we tried through SPIA Interface.

AFE7900EVM: AFE7900EVM and TSW14J57EVM pin-mapping over FMC - RF & microwave forum - RF & microwave - TI E2E support forums

2)  In addition to above changes we have done changes in hardware for SPIA Interface 

       Shorted: R88, R87, R86 and R83 for SPIA interface and R9 & R13 for FMC to FPGA connection.

       Removed: R266, R267, R268 and R274

Log file generated registers are used for SPI programming. But we are not able to get the link between ADC and FPGA. Registers used and signal tap are attached for reference.

Still LMK is programmed through USB.  

Kindly Suggest 

Regards,

Soumya

000030
0000b0
000030
000030
000030
80030a
800478
800500
800620
800751
800804
001580
019100
023100
02d100
037100
042a00
04e200
059a00
065200
070a00
07c200
00ec01
00f401
00e401
00ed00
00f500
00e500
001500
001540
019003
019001
001500
001502
00c000
001500
001540
017001
054000
817101
001500
001501
005481
001500
001540
017000
054000
001500
001540
08a802
081001
083001
020000
021000
081400
083400
081401
083401
081000
083000
081001
083001
020005
021000
081403
083403
081400
083400
081000
083000
081400
083400
08141c
08341c
081400
083400
81500f
81500f
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083001
081001
09100f
091103
09120f
001500
001610
00c102
00c042
00c042
00c0c2
00c042
001600
001820
014001
014000
80f001
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80fa0b
80f918
80f801
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019390
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014408
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001808
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014408
001800
001808
1a2c10
1a2d27
1a2e00
1a2f00
001800
001820
014408
001800
001808
1a3010
1a3127
1a3200
1a3300
001800
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014408
001800
001808
1a3410
1a3527
1a3600
1a3700
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014408
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03bf00
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03bd80
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03c117
03c046
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014408
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1ee800
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1b5f22
001800
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014408
001800
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1b6f07
001800
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014408
001800
001808
1e7d07
001800
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014408
001800
001808
1a74f0
1a7501
001800
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014408
001800
001808
1b2af0
1b2b01
001800
001820
80f007
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019390
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00a308
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019378
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014400
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019378
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80fb15
80fa0b
80f91b
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001800
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001540
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001500
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019333
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003f08
002801
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003b08
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003c60
003c20
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005643
0056c3
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07f43f
001500
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006d02
006c3f
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010f12
010e00
001500
001501
0050fe
0050fe
0050fe
001500
001502
011000
001500
001501
00513d
001500
001502
011100
001500
001501
007f00
001500
001502
011201
001500
001501
00513d
001500
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001500
001501
007f00
001500
001502
011401
001500
001501
00513d
001500
001502
011502
001500
001501
00512d
006301
007202
006f03
007002
007102
006d02
006c3f
007c04
0055ff
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005c00
005d04
005d0c
003d01
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006522
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005e00
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003e00
003f08
006520
008700
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008410
008490
006947
004520
003200
004938
00493d
004a00
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004dc0
004a06
004b0a
004040
004100
0043f8
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004524
003100
004663
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006407
006500
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0056f3
005804
006200
006600
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006301
806633
806633
806633
806633
006631
006381
0063c1
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001500
001580
085b00
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001500
001501
006a00
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005806
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0063c0
001500
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00c100
001500
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006340
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006633
001500
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001580
010d04
010caf
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024d04
024caf
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042103
04201f
04d903
04d81f
059103
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064903
06481f
070103
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07b903
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001500
001840
008601
008210
008301
008400
008401
008400
001800
001820
80f007
019312
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
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001800
001610
00c042
00c040
00c401
002012
002112
002012
002112
002012
002112
001600
001620
700700
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700700
700600
700700
700600
700700
700600
001640
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001600
001502
010700
010600
010501
010401
001500
001620
701b08
701a88
701b00
701a00
701b07
701a77
701b00
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001640
701b08
701a88
701b00
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701b07
701a77
701b00
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001600
001610
00c040
002012
002112
001600
001660
7029ff
7028f0
701b0a
701aaa
701b00
701a00
700700
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001620
49f192
49f000
49f3ea
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49e200
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49fffd
49feb0
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49d806
420110
42006b
420364
420280
420562
420400
42077b
420633
420970
42080a
420bbd
420a68
420d76
420c2d
420f66
420eab
4211d0
421008
421300
421218
421566
42142c
42173d
421615
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421880
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421d34
421c00
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422110
42201a
423903
423840
423b00
423a60
423d00
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400633
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4011d0
401008
401300
401218 
401566
40142c
40173d
401615 
401900
401880 
401b00
401a02 
401d34
401c00 
401f00
401e00 
402110
40201a 
403903
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001600
00130f
015a00
001300
001580
00ed00
00f500
00e50f
001500
001820
80f007
00a300
00a200
00a100
00a000
00a700
00a600
00a500
00a401
019352
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
80f007
00a300
00a200
00a103
00a000
019353
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
001800
0019f0
032000
001900
001580
00ed0f
00f500
00e500
001500
00100f
003c01
003c00
001000
001580
00ed00
00f503
00e500
001500
001030
003c01
003c00
001000
001820
80f007
00a300
00a200
00a100
00a000
019390
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
014408
001800
001808
1f8f05
001800
001820
80f007
00a300
00a200
00a100
00a001
019390
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
80f007
00a301
00a201
00a100
00a005
01939f
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
80f007
00a300
00a20b
00a100
00a005
019349
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
80f007
00a300
00a200
00a100
00a005
01934b
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
80f007
00a300
00a200
00a100
00a000
00a700
00a600
00a500
00a400
019313
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
001800
001201
94c700
94c600
94c400
14c400
001202
94c700
94c600
94c400
14c400
001204
94c700
94c600
94c400
14c400
001208
94c700
94c600
94c400
14c400
001200
001210
94c700
94c600
94c400
14c400
001220
94c700
94c600
94c400
14c400
001200
001820
80f007
01933d
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
001800
001580
00ed00
00f503
00e500
00ed0f
00f500
00e500
00ec00
00f400
00e400
001500
001820
80f007
00a300
00a200
00a100
00a000
019315
80f007
80f007
80f100
80f007
80f007
80f007
80f007
80f300
80f200
80f700
80f600
80f500
80f400
001800
001603
002400
00f00f
00f000
001600
00160c
006400
012801
012800
012804
012800
001600
0019f0
0a400f
0a410f
0a440f
0a450f
0a460f
0a4000
0a4100
0a4400
0a4500
0a4600
054d07
054cff
058007
058907
06b401
06b403
054d00
054c00
058000
058900
06b402
06b400
052c1f
052c00
001900
001580
00ec01
00f401
00e401
00ed0f
00f500
00e50f
001500
001601
010900
001602
010900
001601
010a00
001602
010a00
001601
010b00
001602
010b00
001600
001340
012414
017414
001380
012414
017414
001300
00160c
002001
002003
002002
002000
0064f0
012801
006400
012800
001600
001603
006d01
006d05
006d07
006d06
006d02
006d00
002401
002400
001600
001540
017001
054000
817101
001500
001501
007708
00820c
00770b
0076ff
00770b
00770f
00770b
007703
008200
007700
007600
001500
001540
017000
054000

  • Hi Soumya,

    Sorry for the delay.

    In regards to question 1, like the post said, only SPIA is functional on reset of AFE7900. SPIB1 and SPIB2 ports have to configured to function as SPI ports through SPIA.

    In regards to question 2:

    • If you shorted R9 & R13 you will have two SPIASDO and two SPIASEN pins on the FMC. We would suggest disconnecting whichever two the FPGA is not driving to avoid bus contention.

     

    • Could you provide what JESD errors are reported by your FPGA? Any LOS errors?
    • When programing the AFE do you see any changes in the current consumption?
    • Before programming did you do a hardware, reset to the AFE as required? This can be done by either pressing SW1 in the AFE7900EVM or by controlling the reset from the FPGA. To control the reset through the FPGA you must remove R94 and populate R93 in the AFE7900EVM.

    Best,

    Camilo

  • Hi Camilo,

    1. After Removing R11, R14 Resistor we are able to resolve the bus contention issue.

    2. The JESD errors are reported by FPGA are:

    - Running disparity error and 8B/10B block PCS are not successfully decoding the incoming characters from the ADC.

    - ADC is not transmitting K Character or BC Hexadecimal number to FPGA. Which starts the CGS Phase.

    3. After programming the ADC, at the initial condition current consumption is 0.8 to 1 Amp and at the final stage (around at the last 100's Registers) current varies from 1.1 to 1.2 Amp and stabilizing at 1.2 Amp's.

    4. Before Programming the AFE, we are controlling the RESET from FPGA with necessary changes (Removing R94 Resistor).

    5. we are not able to receiver the 0xBC character from the ADC as we are not able to read proper data from the below registers. Indexes are from attached txt file of        spi write registers:

           a. Index:10247 (0x00f0), read data 0xff. --Read operation

           b. Index:10276 (0x00f0), read data 0xff. --Read operation

           c. Index:11368 (0x00f0), read data 0x00. -- poll check 

          d. Index:11379 (0x00f0), read data 0x00. -- poll check

          e. Index:11408 (0x00f0), read data 0x00. -- poll check

    For reference errors screenshot and Registers used for programming are attached.

    Anticipating your prompt reply.

    Regards,

    Soumya

    spi_write_c_code.txt

  • Hi Soumya,

    Glad that was able to resolve the SPI issue. To continue the debugging, we have the following questions:

    You said this configuration had worked before correct? Do you have the python file so that we can check this on our EVM?

    If there are any read check and/or poll fail during configuration we must address those first. Is the read on line 10247 the first read check or poll error you see? If yes, do you see it fail all the time at this step?

    Best,

    Camilo

  • Hi Camilo,

    Yes, this configuration has worked through GUI.

    Yes, the first Error in Read and poll check is started with line 10247 and this fail is consistence for all the time for above 5 registers.

    Python code is attached for your reference.

    sysParams							=AFE.systemParams
    setupParams.skipFpga 				= 1
    #setupParams.fpgaRefClk 				= 245.76	
    setupParams.fpgaRefClk 				= 368.64
    #setupParams.fpgaRefClk 				= 184.32
    AFE.systemStatus.loadTrims			= 1
    
    sysParams.FRef                    	= 491.52
    sysParams.FadcRx                  	= 2949.12
    sysParams.FadcFb				  	= 2949.12
    sysParams.Fdac                    	= 8847.36
    sysParams.rxEnable                  =[True,False,True,False]
    sysParams.fbEnable                  =[False,False]
    sysParams.txEnable                  =[False,False,False,False]
    sysParams.enableDacInterleavedMode	= False 					#DAC interleave mode to save power consumption. Fs/2 - Fin spur occurs
    
    sysParams.modeTdd 					= 0		
    										# 0- Single TDD Pin for all Channels
    										# 1- Separate Control for 2T/2R/1F
    										# 2- Separate Control for 1T/1R/1F			
    
    sysParams.topLevelSystemMode		= 'StaticTDDMode'
    sysParams.RRFMode 					= 0   #4T4R2F FDD mode
    sysParams.jesdSystemMode			= [3,3]
    										#SystemMode 0:	2R1F-FDD						; rx1-rx2-fb-fb
    										#SystemMode 1:	1R1F-FDD						; rx1-rx1-fb-fb
    										#SystemMode 2:	2R-FDD							; rx1-rx1-rx2-rx2
    										#SystemMode 3:	1R								; rx1-rx1-rx1-rx1
    										#SystemMode 4:	1F								; fb-fb-fb-fb
    										#SystemMode 5:	1R1F-TDD						; rx1/fb-rx1/fb-rx1/fb-rx1/fb
    										#SystemMode 8:	1R1F-TDD 1R-FDD	(FB-2Lanes)(RX1 RX2 interchanged)		; rx2/fb-rx2/fb-rx1-rx1
    
    
    sysParams.jesdLoopbackEn			= 0 #Make it 1 to Enable the JESDTX to JESDRX internal loopback
    #sysParams.LMFSHdRx                	=['24410', '24410', '24410', '24410']	
    sysParams.LMFSHdRx                	=['12610', '12610', '12610', '12610']	
    #sysParams.LMFSHdRx                	=['12810', '12810', '12810', '12810']	
    										# The 2nd and 4th are valid only for jesdSystemMode values in (2,6,7,8). For other modes, select 4 converter modes for 1st and 3rd.
    #sysParams.LMFSHdFb                	= ["12810","12810"]
    sysParams.LMFSHdFb                	= ["12610","12610"]
    #sysParams.LMFSHdFb                	= ["12410","12410"]
    sysParams.LMFSHdTx                	= ["24410","24410","24410","24410"]
    sysParams.jesdTxProtocol            = [0,0]
    sysParams.jesdRxProtocol            = [0,0]
    sysParams.serdesFirmware			= True 		# If you want to lead any firmware, please speify the path here. Otherwise it will not write any firmware
    sysParams.jesdTxLaneMux				= [0,1,2,3,4,5,6,7]	
    												# Enter which lanes you want in each location. 
    												# Note that across 2T Mux is not possible in 0.5.
    												# For example, if you want to exchange the first two lines of each 2T, this should be [[1,0,2,3],[5,4,6,7]]
    sysParams.jesdRxLaneMux				= [0,1,2,3,4,5,6,7]	
    												# Enter which lanes you want in each location.
    												# Note that across 2R Mux is not possible in 0.5.
    												# For example, if you want to exchange the first two lines of each 2R, this should be [[1,0,2,3],[5,4,6,7]]
    sysParams.txDataMux					= [2,3,0,1,4,5,6,7]
    sysParams.jesdRxRbd					= [4, 4]
    
    sysParams.rxJesdTxScr				= [False,False,False,False]
    sysParams.fbJesdTxScr				= [False,False]
    #sysParams.jesdRxScr					= [True,True,True,True]
    sysParams.jesdRxScr					= [False,False,False,False]
    #sysParams.serdesTxLanePolarity		= [False,False,False,False,False,False,False,False]
    sysParams.serdesTxLanePolarity		= [True,True,True,True,True,True,True,True]
    
    sysParams.rxJesdTxK					= [32,32,32,32]
    sysParams.fbJesdTxK					= [32,32]
    sysParams.jesdRxK					= [32,32,32,32]
    
    sysParams.ncoFreqMode 				= "1KHz"
    
    # NCO 0 SETTINGS 
    
    sysParams.txNco0					= 	[[3200,3200],		#Band0, Band1 for TxA for NCO0
    										[3200,3200],        #Band0, Band1 for TxB for NCO0
    										[3200,3200],        #Band0, Band1 for TxC for NCO0
    										[3200,3200]]        #Band0, Band1 for TxD for NCO0
    										
    sysParams.rxNco0					= 	[[3200,3200],		#Band0, Band1 for RxA for NCO0
    										[3200,3200],        #Band0, Band1 for RxB for NCO0
    										[3200,3200],        #Band0, Band1 for RxC for NCO0
    										[3200,3200]]        #Band0, Band1 for RxD for NCO0
    
    sysParams.fbNco0					= 	[3200,3200]			#FBA, FBC for NCO0
    
    # ADDED ON 02-11-23 NCO 1 SETTINGS 
    
    # sysParams.txNco1					= 	[[3100,3100],		#Band0, Band1 for TxA for NCO0
    # 										[3100,3100],        #Band0, Band1 for TxB for NCO0
    # 										[3100,3100],        #Band0, Band1 for TxC for NCO0
    # 										[3100,3100]]        #Band0, Band1 for TxD for NCO0
    # 										
    # sysParams.rxNco1					= 	[[3100,3100],		#Band0, Band1 for RxA for NCO0
    # 										[3100,3100],        #Band0, Band1 for RxB for NCO0
    # 										[3100,3100],        #Band0, Band1 for RxC for NCO0
    # 										[3100,3100]]        #Band0, Band1 for RxD for NCO0
    # 
    # sysParams.fbNco1					= 	[3100,3100]			#FBA, FBC for NCO0
    
    
    # # our working nco
    # sysParams.txNco0					= 	[[2698.24,2698.24],		#Band0, Band1 for TxA for NCO0
    # 										[2698.24,2698.24],        #Band0, Band1 for TxB for NCO0
    # 										[2698.24,2698.24],        #Band0, Band1 for TxC for NCO0
    # 										[2698.24,2698.24]]        #Band0, Band1 for TxD for NCO0
    # 
    # sysParams.rxNco0					= 	[[2698.24,2698.24],		#Band0, Band1 for RxA for NCO0
    # 										[2698.24,2698.24],        #Band0, Band1 for RxB for NCO0
    # 										[2698.24,2698.24],        #Band0, Band1 for RxC for NCO0
    # 										[2698.24,2698.24]]        #Band0, Band1 for RxD for NCO0
    # 
    # sysParams.fbNco0					= 	[2698.24,2698.24]			#FBA, FBC for NCO0
    
    # c band
    #sysParams.txNco0					= 	[[5850,5850],		#Band0, Band1 for TxA for NCO0
    #										[5850,5850],        #Band0, Band1 for TxB for NCO0
    #										[5850,5850],        #Band0, Band1 for TxC for NCO0
    #										[5850,5850]]        #Band0, Band1 for TxD for NCO0
    
    #sysParams.rxNco0					= 	[[5850,5850],		#Band0, Band1 for RxA for NCO0
    #										[5850,5850],        #Band0, Band1 for RxB for NCO0
    #										[5850,5850],        #Band0, Band1 for RxC for NCO0
    #										[5850,5850]]        #Band0, Band1 for RxD for NCO0
    
    #sysParams.fbNco0					= 	[5850,5850]			#FBA, FBC for NCO0
    
    
    
    
    sysParams.numBandsRx				= [0]*4					# 0 for single, 1 for dual
    sysParams.numBandsFb				= [0,0]				
    sysParams.numBandsTx				= [0,0,0,0]
    
    #sysParams.ddcFactorRx             	= [48,48,48,48]			# DDC decimation factor for RX A, B, C and D
    sysParams.ddcFactorRx             	= [24,24,24,24]			# DDC decimation factor for RX A, B, C and D
    sysParams.ddcFactorFb             	= [24,24]
    sysParams.ducFactorTx             	= [36,36,36,36]
    
    
    ## The following parameters sets up the LMK04828 clocking schemes
    lmkParams.pllEn						=	True#False
    lmkParams.inputClk					=	1474.56#737.28
    lmkParams.sysrefFreq				=	3.84
    #lmkParams.sysrefFreq				=	1.92
    lmkParams.lmkFrefClk				=	True
    
    ## The following parameters sets up the register and macro dumps
    logDumpInst.setFileName(ASTERIX_DIR+DEVICES_DIR+r"\Afe79xxPg1.txt")
    logDumpInst.logFormat				= 0x00
    logDumpInst.rewriteFile				= 1
    logDumpInst.rewriteFileFormat4		= 1
    device.optimizeWrites				= 0
    device.rawWriteLogEn				= 1
    
    ## The following parameters sets up the SYNCIN and SYNCOUT to interface with the TSW14J57
    sysParams.jesdABLvdsSync			= 1
    sysParams.jesdCDLvdsSync			= 1
    sysParams.rxJesdTxSyncMux			= [0,0,0,0]
    sysParams.fbJesdTxSyncMux			= [0,0]
    sysParams.jesdRxSyncMux				= [0,0,0,0]		#[0,0,1,1]
    sysParams.syncLoopBack				= True
    sysParams.serdesFirmware			= True
    
    
    
    
    # ## The following parameters sets up the AGC
    ## CHANNEL A
    #sysParams.agcParams[0].agcMode = 2 ##internal AGC-1,external agc-4 pin configuration-3
    #sysParams.agcParams[0].en_agcfreeze_pin = 0 #Enable or Disable pin based AGC freeze.
    #sysParams.agcParams[0].tdd_freeze_agc = 1 #1: Freeze Whether to reset or freeze the attack detectors during the OFF period of TDD
    #sysParams.agcParams[0].gpioRstEnable = 0 ##disable GPIO based reset to AGC detector 
    #sysParams.agcParams[0].atken = [0,1,0] ##enable big and small step attack
    #sysParams.agcParams[0].decayen = [0,1,0] ##enable big and small step decay
    #sysParams.agcParams[0].atksize = [1,2] ## bigs step = 2dB, small step = 1dB
    #sysParams.agcParams[0].decaysize = [1,2] ##big step = 2dB, small step = 1dB
    #sysParams.agcParams[0].atkthreshold = [-1,-2,-14] ##attack threshold
    #sysParams.agcParams[0].decaythreshold = [-14,-8,-20]  ##decay threshold
    #sysParams.agcParams[0].atkwinlength = [170,170]  ## detector time constant expressed inn absolute time in ns. 
    #sysParams.agcParams[0].decaywinlength = 87380 ##detector time constant expressed in absolute time in ns. All detectors use the same value for decay time constant
    #sysParams.agcParams[0].atkNumHitsAbs = [8,8] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
    #sysParams.agcParams[0].decayNumHitsAbs = [8,8] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
    #sysParams.agcParams[0].minDsaAttn = 0 ##minimum DSA attenuation used by AGC
    #sysParams.agcParams[0].maxDsaAttn = 4 ##maximum DSA attenuation used by AGC
    #sysParams.agcParams[0].totalGainRange = 4 ##total gain range used by ALC for gain compensation
    #sysParams.agcParams[0].minAttnAlc = 0 ##minimum attenuation used by ALC for compensation when useMinAttnAgc = 0
    #sysParams.agcParams[0].useMinAttnAgc = 0 ##enable ALC to use minimum attenuation from AGC for which compensation is required.
    #sysParams.agcParams[0].alcEn = 0
    #sysParams.agcParams[0].alcMode = 0 ##floating point DGC
    #sysParams.agcParams[0].fltPtMode = 0 ##if exponent > 0, dont send MSB
    #sysParams.agcParams[0].fltPtFmt = 1 ##3 bit exponent
    
    #sysParams.agcParams[0].pkDetPinLsbSel =0
    #sysParams.agcParams[0].pkDetOnPenultimateLsb =0
    
    ## CHANNEL C
    #sysParams.agcParams[2].agcMode = 2 ##internal AGC-1,external spi configuration-2,external agc-4 pin configuration-3
    #sysParams.agcParams[2].en_agcfreeze_pin = 0 #Enable or Disable pin based AGC freeze.
    #sysParams.agcParams[2].tdd_freeze_agc = 1 #1: Freeze Whether to reset or freeze the attack detectors during the OFF period of TDD
    #sysParams.agcParams[2].gpioRstEnable = 0 ##disable GPIO based reset to AGC detector 
    #sysParams.agcParams[2].atken = [0,1,0] ##enable big and small step attack
    #sysParams.agcParams[2].decayen = [0,1,0] ##enable big and small step decay
    #sysParams.agcParams[2].atksize = [1,2] ## bigs step = 2dB, small step = 1dB
    #sysParams.agcParams[2].decaysize = [1,2] ##big step = 2dB, small step = 1dB
    #sysParams.agcParams[2].atkthreshold = [-1,-2,-14] ##attack threshold
    #sysParams.agcParams[2].decaythreshold = [-14,-8,-20]  ##decay threshold
    #sysParams.agcParams[2].atkwinlength = [170,170]  ## detector time constant expressed inn absolute time in ns. 
    #sysParams.agcParams[2].decaywinlength = 87380 ##detector time constant expressed in absolute time in ns. All detectors use the same value for decay time constant
    #sysParams.agcParams[2].atkNumHitsAbs = [8,8] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
    #sysParams.agcParams[2].decayNumHitsAbs = [8,8] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
    #sysParams.agcParams[2].minDsaAttn = 0 ##minimum DSA attenuation used by AGC
    #sysParams.agcParams[2].maxDsaAttn = 4 ##maximum DSA attenuation used by AGC
    #sysParams.agcParams[2].totalGainRange = 4 ##total gain range used by ALC for gain compensation
    #sysParams.agcParams[2].minAttnAlc = 0 ##minimum attenuation used by ALC for compensation when useMinAttnAgc = 0
    #sysParams.agcParams[2].useMinAttnAgc = 0 ##enable ALC to use minimum attenuation from AGC for which compensation is required.
    #sysParams.agcParams[2].alcEn = 0
    #sysParams.agcParams[2].alcMode = 0 ##floating point DGC
    #sysParams.agcParams[2].fltPtMode = 0 ##if exponent > 0, dont send MSB
    #sysParams.agcParams[2].fltPtFmt = 1 ##3 bit exponent
    #sysParams.agcParams[2].pkDetPinLsbSel =0
    #sysParams.agcParams[2].pkDetOnPenultimateLsb =0
    
    ## The following parameters sets up the GPIOs
    sysParams.gpioMapping={
    		'H8': 'ADC_SYNC0',
    		'H7': 'ADC_SYNC1',
    		'N8': 'ADC_SYNC2',
    		'N7': 'ADC_SYNC3',
    		'H9': 'DAC_SYNC0',
    		'G9': 'DAC_SYNC1',
    		'N9': 'DAC_SYNC2',
    		'P9': 'DAC_SYNC3',
    		'P14': 'GLOBAL_PDN',
    		'K14': 'FBABTDD',
    		'R6': 'FBCDTDD',
    		'H15': ['TXATDD','TXBTDD'],
    		'V5': ['TXCTDD','TXDTDD'],
    		'E7': ['RXATDD','RXBTDD'],
    		'R15': ['RXCTDD','RXDTDD'],
    		#'G16': ['RX_NCOSEL_0','RX_NCOSEL_1'],# ADDED ON 02-11-23
    		#'L14': ['TX_NCOSEL_0','TX_NCOSEL_2'],# ADDED ON 02-11-23
    #		'H11': ['TX_NCOSEL_0','TX_NCOSEL_2'],
    #		'H16': ['FB_NCOSEL_0','FB_NCOSEL_2']
    	}
    		
    #AFE.systemParams.papParams[0]['enable'] = True
    #AFE.systemParams.papParams[1]['enable'] = True
    #AFE.systemParams.papParams[2]['enable'] = True
    #AFE.systemParams.papParams[3]['enable'] = True
    	
    
    	
    ## Initiates LMK04828 and AFE79xx Bring-up
    setupParams.skipLmk	=	False
    
    AFE.initializeConfig()
    lmkParams.sysrefFreq = AFE.systemStatus.sysrefFreq
    lmkParams.lmkPulseSysrefMode = False
    AFE.LMK.lmkConfig()
    ## Initiates AFE79xx Bring-up
    setupParams.skipLmk	=	True
    AFE.deviceBringup()
    
    AFE.TOP.overrideTdd(15,0,15)
    
    ### ADC Ramp Out
    for i in range(3):
    	AFE.JESD.ADCJESD[0].adcRampTestPattern(i,1,1)
    	AFE.JESD.ADCJESD[1].adcRampTestPattern(i,1,1)
    
    #AFE.JESD.ADCJESD[0].adcRampTestPattern(i,0,1)
    #AFE.JESD.ADCJESD[1].adcRampTestPattern(i,0,1)
    
    # val=20
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_TEST_PATTERN_CTRL.rx1_jesd_test_sig_gen_mode=1
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_TEST_PATTERN_CTRL.rx2_jesd_test_sig_gen_mode=1
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_TEST_PATTERN_CTRL.rx1_jesd_test_sig_gen_mode=1
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_TEST_PATTERN_CTRL.rx2_jesd_test_sig_gen_mode=1
    
    # 
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input0=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input1=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input2=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input3=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input4=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input5=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input6=val
    # device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input7=val
    # 
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input0=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input1=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input2=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input3=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input4=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input5=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input6=val
    # device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input7=val
    #
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input0=0x1122
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input1=0x3344
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input2=0x5566
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input3=0x7788
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input4=0x99AA
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input5=0xBBCC
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input6=0xCCDD
    device.JESD.ADC_JESD[0].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input7=0xEEFF
    
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input0=0x0102
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input1=0x0304
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input2=0x0506
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input3=0x0708
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input4=0x090A
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input5=0x0B0C
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input6=0x3344
    device.JESD.ADC_JESD[1].ADC_JESD.ADC_JESD_SHORT_TEST_PATTERN.jesd_short_test_pattern_input7=0x3344
    
    ### DSA Settings
    
    # working code
    for i in range(4):
    	AFE.DSA.setRxDsa(i,10)
    
    #Relinks ADC and DAC links.
    #If pinSysref is 0, internal copy of sysref is used for relinking.
    #If pinSysref is 1, pin based sysref is used for linking.
    AFE.adcDacSync(0)
    
    
    
    
    
    # error with library of DSA
    #AFE.DSA.setRxDsa(0,24)
    #AFE.DSA.setRxDsa(1,24)
    #AFE.DSA.setRxDsa(2,24)
    #AFE.DSA.setRxDsa(3,24)	
    #CAFE.setRxDsa(0,1,10)
    
    #  
    #CAFE.setRxDsaMode(0,0,3)
    #CAFE.setRxDsaMode(0,1,3)
    #CAFE.setRxDsa(0,1,10)
    #CAFE.setRxDsa(0,1,10)
    
    	
    	
    
    
    
    		
    		

    Thanks,

    Soumya

  • Hi Soumya,

    We will test this configuration on our side.

    In the mean time, could you read registers 0xf0 through 0xf7 after the read check fail on line 10247 and provide us with the values?

    These registers are the macro status registers and can provide us with information on why it is failing the Macro.

    Also, just to make sure, you have the limits on your power supply for the EVM set to 5.5V and 5A correct?

    Best,

    Camilo

  • Hi Camilo,

    We have read the registers after and before index 10247.

    Reading after the index:  

            - 0XF0 to 0xF4 read value is 0xFF

            - 0XF5 to 0xF7 read value is 0x00

    Reading before the index:  

     a. Till 10198 index:

          - 0XF0 read value is 0x07.

          - 0XF1 to 0xF7 read value is 0x00 

    b. then after index 10213 we have added the registers to reset the Macro page and then access the macro page.

        001800  

        001820

        80f000

        80f100

        80f200

        80f300

        80f400

        80f500

        80f600

        80f700

        001800

     --In sequence to above registers, we are reading (JESD ASYNC FIFO OFFSET REGISTER) 0x30,0x31 & 0x32 and then rewriting the same. we are reading the               0xF0 - 0xF7.

            - 0XF0 to 0xF4 read value is 0xFF

            - 0XF5 to 0xF7 read value is 0x00

    -- So, we are not doing read and rewrite operation, we are directly writing 0x11 in 0x30,0x31 & 0x32 registers. then reading 0xF0-0XF7.

           - 0XF0 read value is 0x07.

          - 0XF1 to 0xF7 read value is 0x00 

    c. From the above exercise we are able to remove all the errors by resetting the macro page, and we are able to get the link between ADC and FPGA, and real data is also received properly.

    d. Why resetting the page is required to clear the errors in macro page. Kindly give clarity on what we have understood.

    And, the power supply is set to 5V, and Current limit max is 40Amp.

    Regards,

    Soumya

  • Hi Soumya,

    Just to confirm, so the only changes you made were instead of reading and writing to registers 0x30,0x31 & 0x32 you just wrote 0x11 to registers 0x30,0x31 & 0x32, then you read registers 0xf0 to 0xf7 from the Macro page, and now the Macro passes 

    Could you also provide the new log file of SPI transactions?

    Best,

    Camilo

  • Hi Camilo,

     Yes, instead of reading and writing. We are just writing 0x11.After that Macro passes.

     New SPI Write script is attached for your reference.

    Regards,

    Soumya

    SPI_Reg.txt 

  • Hi Soumya,

    I have forwarded this to our software team so that they can advise.

    Just to make sure, if you remove the reads for registers 0xf0 to 0xf7 between index 10205 and 10215 like I have done in the file below does the macro still pass?

    SPI_Reg_Test_NoStatusRead.txt

    Best,

    Camilo

  • Hi Camilo,

     Yes, Macro passes for registers that you have shared with us.

    Regards,

    Soumya

  • Hi Camilo,

    Can we have any update on this.

    Regards,

    Soumya

  • Hi Soumya,

    Our software team is still looking into this.

    I will reach out again to ask for an update.

    Best,

    Camilo