Part Number: AFE7950
Hi,
Could you check below weird spectrum?

Customer would like to use 1.5GHz interface rate on 1 Tx ch.
Center frequency is now 5GHz due to spectrum analyzer specification but they will use 9.6GHz finally.
Additional question is that AFE7950 use signed signal?
Below is latte script.
############## Read me ##############
#Select AFE7950 TX_44210; Data Rate = 1500M
#Select AFE7950 RX_22210; Data Rate = 1500M ---> To capture 1 RX channels
#Select AFE7950 FB_22210; Data Rate = 1500M ---> To capture 1 FB channels
sysParams=AFE.systemParams
sysParams.__init__();sysParams.chipVersion=chipVersion
setupParams.skipFpga = 1 # setup FPGA (TSW14J56) using HSDC Pro
############## Top Level ##############
sysParams.FRef = 250
sysParams.FadcRx = 3000
sysParams.FadcFb = 3000
sysParams.Fdac = 12000
sysParams.RRFMode = 5
#RRFMode 0: 4T4R2F FDD Mode
#RRFMode 1: 4T4R1F FDD Mode
#RRFMode 2: 4T2R2F FDD Mode Quad Band
#RRFMode 5: 4T4R2F TDD Non-Shared
#RRFMode 6: 4T4R1F TDD Non-shared
#RRFMode 7: 4T4R2F TDD Shared
#RRFMode 8: 4T4R1F TDD Shared
#RRFMode 10: 2T2R1F TDD AB / 2T2R1F FDD CD
#RRFMode 11: 2T2R1F FDD AB / 2T2R1F TDD CD
sysParams.externalClockRx=False
sysParams.externalClockTx=False
############## Digital Chain ##############
##### RX #####
sysParams.ddcFactorRx = [2,2,2,2] #DDC decimation factor for RX A, B, C and D. value = FadcRX/Data Rate
sysParams.numBandRx = [0,0,0,0] #RX A, B, C and D are single band.
sysParams.numRxNCO = 1 #No NCO switching.
sysParams.ncoRxMode = [0,0]
sysParams.rxNco0 = [[5000,5000], #Band0, Band1 for RXA. value = RF center frequency
[5000,5000], #Band0, Band1 for RXB. value = RF center frequency
[5000,5000], #Band0, Band1 for RXC. value = RF center frequency
[5000,5000]] #Band0, Band1 for RXD. value = RF center frequency
sysParams.rxEnable = [True,True,False,False] #RXA enable
#RXB enable
#RXC disable
#RXD disable
##### FB #####
sysParams.ddcFactorFb = [2,2] #DDC decimation factor for FB 1 and 2. value = FadcFb/Data Rate
sysParams.numFbNCO = 1 #No NCO switching.
sysParams.ncoFbMode = 0
sysParams.fbNco0 = [5000,5000] #Band0 for FB1 and FB2. value = RF center frequency
sysParams.fbEnable = [False,False] #FB AB disable
#FB CD disable
##### TX #####
sysParams.ducFactorTx = [8,8,8,8] #DUC interpolation factor for TX A, B, C and D. value = Fdac/Data Rate
sysParams.numBandsTx = [0,0,0,0] #TX A, B, C and D are single band.
sysParams.combineDucMode= [0,0] #No combine the 2 TX channels.
sysParams.numTxNCO = 1 #No NCO switching.
sysParams.ncoTxMode = [0,0]
sysParams.txNco0 = [[5000,5000], #Band0, Band1 for TXA. value = RF center frequency
[5000,5000], #Band0, Band1 for TXB. value = RF center frequency
[5000,5000], #Band0, Band1 for TXC. value = RF center frequency
[5000,5000]] #Band0, Band1 for TXD. value = RF center frequency
sysParams.txEnable = [True,True,False,False] #TXA enable
#TXB enable
#TXC disable
#TXD disable
############## JESD ##############
##### ADC-JESD #####
sysParams.jesdSystemMode= [3,3]
#SystemMode 0: 2R1F-FDD ; rx1 -rx2 -fb -fb
#SystemMode 1: 1R1F-FDD ; rx -rx -fb -fb
#SystemMode 2: 2R-FDD ; rx1 -rx1 -rx2 -rx2
#SystemMode 3: 1R ; rx -rx -rx -rx
#SystemMode 4: 1F ; fb -fb -fb -fb
#SystemMode 5: 1R1F-TDD ; rx12/fb-rx12/fb-rx12/fb-rx12/fb
#SystemMode 8: 1R1F-TDD 1R-FDD ; rx1 - -rx2/fb -rx2/fb
sysParams.jesdTxProtocol= [2,2] # 0 - 8b/10b encoding; 2 - 64b/66b encoding
sysParams.LMFSHdRx = ["22210","22210","22210","22210"]
# The 2nd and 4th are valid only for jesdSystemMode values in (0,2).
# For other modes, select 4 converter modes for 1st and 3rd.
sysParams.LMFSHdFb = ["22210","22210"]
sysParams.rxJesdTxScr = [False,False,False,False]
sysParams.fbJesdTxScr = [False,False]
sysParams.rxJesdTxK = [1,1,1,1] #LCM(256,F)/256 for JESD204C.
sysParams.fbJesdTxK = [1,1]
sysParams.jesdTxLaneMux = [1,0,2,3,4,5,6,7] # Enter which lanes you want in each location.
# For example, if you want to exchange the first two lines of each 2T,
# this should be [[1,0,2,3],[5,4,6,7]]
##### DAC-JESD #####
sysParams.jesdRxProtocol= [2,2] # 0 - 8b/10b encoding; 2 - 64b/66b encoding
sysParams.LMFSHdTx = ["44210","44210","44210","44210"]
sysParams.jesdRxLaneMux = [2,1,0,3,4,5,6,7] # Enter which lanes you want in each location.
# For example, if you want to exchange the first two lines of each 2R
# this should be [[1,0,2,3],[5,4,6,7]]
sysParams.jesdRxRbd = [4, 4]
sysParams.jesdRxScr = [False,False,False,False]
sysParams.jesdRxK = [1,1,1,1]
##### JESD Common #####
sysParams.jesdABLvdsSync= True
sysParams.jesdCDLvdsSync= True
sysParams.syncLoopBack = False #JESD Sync signal is connected to FPGA
############## GPIO ##############
sysParams.gpioMapping = {
'H8': 'ADC_SYNC0',
'H7': 'ADC_SYNC1',
'N8': 'ADC_SYNC2',
'N7': 'ADC_SYNC3',
'H9': 'DAC_SYNC0',
'G9': 'DAC_SYNC1',
'N9': 'DAC_SYNC2',
'P9': 'DAC_SYNC3',
'P14': 'GLOBAL_PDN',
'K14': 'FBABTDD',
'R6': 'FBCDTDD',
'H15': ['TXATDD','TXBTDD'],
'V5': ['TXCTDD','TXDTDD'],
'E7': ['RXATDD','RXBTDD'],
'R15': ['RXCTDD','RXDTDD']}
############## LMK Params ##############
lmkParams.pllEn = True
lmkParams.inputClk = 983.04 # Valid only when lmkParams.pllEn = False
lmkParams.lmkFrefClk = True
setupParams.fpgaRefClk = 375
############## Logging ##############
logDumpInst.setFileName(ASTERIX_DIR+DEVICES_DIR+r"\Afe79xxPg1.txt")
logDumpInst.logFormat=0x1 #Modify to 0x1 to save register scequence to log file. Script takes more time to execute.
logDumpInst.rewriteFile=1
logDumpInst.rewriteFileFormat4=1
device.optimizeWrites=0
device.rawWriteLogEn=1
device.delay_time = 0
#-------------------------------------------------------------------------------------------------#
AFE.deviceBringup()
AFE.TOP.overrideTdd(15,3,15) # bit-wise; 4R,2F,4T



