AFE7954: TI204C-IP parameters setting

Part Number: AFE7954
Other Parts Discussed in Thread: TSW14J58EVM, AFE7950EVM, LMK04828, AFE7950

Tool/software:

Hi team

I have a question about TI204C-IP parameters

I use it like this:

IP_8B10B

IP_TYPE "TX"

DAC_RESOLUTION 16

NUMBER_OF_TX_LANES 8

NUMBER_OF_QUADS 2

MGT_TYPE "GTHP"

NUMBER_OF_REFCLK_BUFFERS 1

LANE_DAC_TO_GT_MAP {3'd7,3'd6,3'd5,3'd4,3'd3,3'd2,3'd1,3'd0}

TX_LANE_POLARITY 8'b00000000

TX_LANE_DATA_WIDTH 32

TX_F_VAL 4

TX_K_VAL 32

 

and i want use this

INPUT RATE [MSPS] RESOLUTION SENCODING SERDESRATE [Gbps] L-M-F-S-Hd 1 LINK
250 16 8/10b 10 4-8-4-1-0

Table 7-4. JESD204B/C Formats for 1 DUC per TX Chain ( AFE7954_preliminary_datasheet )

Q1. How can I set up the parameters according to the table?

Q2. If I use lane as 8, how do I mapping I,Q?

Q3. What is the effect of setting  NUMBER_OF_QUADS   differently?

Q4. I want the same Single DUC as Figure 7-2. How do I set this up?

Regards,

Jeongju Go

  • Hi Jeongju,

    If all you are trying to do is setup the JESD204C IP to interface with the AFE7954 we can help you by creating a reference design for you if you already have a specific mode for the AFE7954.

    If that is the case, could you send the script for your current mode?

    Best,

    Camilo

  • 
    
     

    Hi Camilo

    Thank for your reply!

     

    First of all, I don't use Latte, so I'll leave my setting about AFE7954.

    <JESD>
    clock = 491.52MHz
    SerDes = 9830.4Mbps
    LMFS = 48410  // but, if i do not allocate 8 lanes, a vivado error will appear.
    IP_8B10B
    IP_TYPE "TX"
    DAC_RESOLUTION = 16
    NUMBER_OF_TX_LANES = 8
    NUMBER_OF_QUADS = 2
    MGT_TYPE "GTHP"
    NUMBER_OF_REFCLK_BUFFERS = 1
    LANE_DAC_TO_GT_MAP = {3'd7,3'd6,3'd5,3'd4,3'd3,3'd2,3'd1,3'd0}
    TX_LANE_POLARITY = 8'b00000000
    TX_LANE_DATA_WIDTH = 32
    TX_F_VAL = 4
    TX_K_VAL = 32

     
    <DAC>
    Tx interface rate config = 245.76 Msps
    Tx DAC rate config = 8847.36 MHz
    channel Frequency resolution(NCO) = 1kHz
    Tx channel Frequency set(NCO) = single, 8071875
    system channel config = 1Tx~4Tx
    system band config = all single
    TDD config = TDD
    Tx nyquist config = second

     

    If there is anything else I need to write, please let me know

    Regards,

    Jeongju Go.

  • Hi Jeongju,

    Thank you for the parameters. Just a question, what FPGA board in specific would you like us to use as a reference? Would it be the TSW14J58EVM, ZCU102, or a different one?

    Best,

    Camilo

  • Hi camilo,

    I use ZCU102 board.

    Regards,

    Jeongju Go.

  • Hi camilo,

    In development, AFE7950EVM and ZCU102 are used.
    Finally, we need to run it in AFE7954 and XQZU9EG-FFRC900.

    Regards,

    Jeongju Go.

  • Hi Jeongju,

    We can create the full design for AFE7950EVM and ZCU102, and we will be able to share it next week.

    I will close the post for now and will reach out to you though email once the design is ready next week.

    Best,

    Camilo

  • Hi Camilo

    Thank for your reply!

    Can you share the TICS_Pro LMK04828 register output and Vitis spi api C code to set AFE7950?

    Regards,

    Jeongju Go.